Experiences Teaching Functional Verification Techniques with Practical Designs. - Tun Li; Yang Guo 003; Sikun Li; Wei Dong; Rangyu Deng (MSE, 2007)

An efficient stream memory architecture for heterogeneous multicore processor. - Rangyu Deng; Weixia Xu; Qiang Dou; Hongwei Zhou; Zefu Dai; Haiyan Chen (ISCC, 2009)

The Virtual Open Page Buffer for Multi-core and Multi-thread Processors. - Hongwei Zhou; Rangyu Deng; Zefu Dai; Xiaobo Yan; Ying Zhang 032; Caixia Sun (HPCC/CSS/ICESS, 2014)

A High Throughput Power-Efficient Optical Memory Subsystem for Kilo-Core Processor. - Quanyou Feng; Chao Peng; Shuangyin Ren; Hongwei Zhou; Rangyu Deng (NCCET, 2017)

Research of Configurable Hybrid Memory Architecture for Big Data Processing. - Hongwei Zhou; Rangyu Deng; Quanyou Feng; Xiaoqiang Ni; Qiang Dou (NCCET, 2017)

Laius: an energy-efficient FPGA CNN accelerator with the support of a fixed-point training framework. - Zikai Nie; Zhisheng Li; Lei Wang 011; Shasha Guo 001; Yu Deng 001; Rangyu Deng; Qiang Dou (Int. J. Comput. Sci. Eng., 2020)

Traversal Packets: Opportunistic Bypass Packets for Deadlock Recovery. - Zhiqiang Chen; Rangyu Deng; Kun Zeng; Xiaoqiang Ni; Hongwei Zhou (IEEE Des. Test, 2022)

Optimizing convolutional neural networks on multi-core vector accelerator. - Zhong Liu 003; Xin Xiao 008; Chen Li 015; Sheng Ma; Rangyu Deng (Parallel Comput., 2022)