Automatic generation of microprocessor test programs. - Catherine Bellon; A. Liothin; Sylvain Sadier; Gabriele Saucier; Raoul Velazco; Francois Grillot; M. Issenman (DAC, 1982)

Test comportemental de microprocesseurs. - Raoul Velazco (1982)

Taking into account asynchronous signals in functional test of complex circuits. - Catherine Bellon; Raoul Velazco (DAC, 1984)

Hardware and Software Tools for Microprocessor Functional Test. - Catherine Bellon; Raoul Velazco (ITC, 1984)

A Microprocessor Test Approach Allowing Fault Localization. - Raoul Velazco; Haissam Ziade; E. Kolokithas (ITC, 1985)

Analysis of Experimental Results on Functional Testing and Diagnosis of Complex Circuits. - Catherine Bellon; Raoul Velazco; Haissam Ziade (ITC, 1988)

Failure coverage of functional test methods: a comparative experimental evaluation. - Raoul Velazco; Catherine Bellon; Bernard Martinet (ITC, 1990)

An A Priori Approach to the Evaluation of Signature Analysis Efficiency. - P. Caspi; J. Piotrowski; Raoul Velazco (IEEE Trans. Computers, 1991)

Analysis and Improvement of Neural Network Robustness for On-Board Satellite Image Processing. - Jean-Denis Muller; Ph. Cheynet; Raoul Velazco (ICANN, 1997)

Operation in Space of Artificial Neural Networks Implemented by Means of a Dedicated Architecture based on a Transputer. - Raoul Velazco; Ph. Cheynet; R. Ecoffet (SBCCI, 1998)

Study of Two ANN Digital Implementations of a Radar Detector Candidate to an On-Board Satellite Experiment. - Raoul Velazco; Christelle Godin; Ph. Cheynet; Santiago Torres-Alegre; Diego Andina; Mirka B. Gordon (IWANN (2), 1999)

Evaluating the Effectiveness of a Software Fault-Tolerance Technique on RISC- and CISC-Based Architectures. - Maurizio Rebaudengo; Matteo Sonza Reorda; Massimo Violante; Ph. Cheynet; Bogdan Nicolescu; Raoul Velazco (IOLTW, 2000)

Estimating Circuit Fault-Tolerance by Means of Transient-Fault Injection in VHDL. - Fabian Vargas 001; Alexandre M. Amory; Raoul Velazco (IOLTW, 2000)

Transient Bitflip Injection in Microprocessor Embedded Applications. - Raoul Velazco; Sana Rezgui (IOLTW, 2000)

Fault-Tolerance in VHDL Description: Transient-Fault Injection & Early Reliability Estimation. - Fabian Vargas 001; Alexandre M. Amory; Raoul Velazco (LATW, 2000)

Hardening the Software with Respect to Transient Errors: a Method and Experimental Results. - Ph. Cheynet; Raoul Velazco; Maurizio Rebaudengo; Matteo Sonza Reorda; Massimo Violante (LATW, 2000)

Designing a Radiation Hardened 8051-Like Micro-Controller. - Fernanda Gusmão de Lima; Érika F. Cota; Luigi Carro; Marcelo Lubaszewski; Ricardo Reis 001; Raoul Velazco; Sana Rezgui (SBCCI, 2000)

System safety through automatic high-level code transformations: an experimental evaluation. - Ph. Cheynet; Bogdan Nicolescu; Raoul Velazco; Maurizio Rebaudengo; Matteo Sonza Reorda; Massimo Violante (DATE, 2001)

Upset-Like Fault Injection in VHDL Descriptions: A Method and Preliminary Results. - Raoul Velazco; Régis Leveugle; Oscar Calvo (DFT, 2001)

Effectiveness and Limitations of Various Software Techniques for "Soft Error" Detection: A Comparative Study. - Bogdan Nicolescu; Raoul Velazco; Matteo Sonza Reorda (IOLTW, 2001)

Upset-like fault injection in VHDL descriptions: A Method and Preliminary Results. - Raoul Velazco; A. Bragagnini; Oscar Calvo (LATW, 2001)

Soft Errors and Tolerance for Soft Errors. - Jim Chung; N. Derhacobian; Jean Gasiot; Michael Nicolaidis; David Towne; Raoul Velazco (VTS, 2001)

Synthesis of an 8051-Like Micro-Controller Tolerant to Transient Faults. - Érika F. Cota; Fernanda Lima 001; Sana Rezgui; Luigi Carro; Raoul Velazco; Marcelo Lubaszewski; Ricardo Reis 001 (J. Electron. Test., 2001)

Injecting Bit Flip Faults by Means of a Purely Software Approach: A Case Studied. - Raoul Velazco; A. Corominas; Pablo A. Ferreyra (DFT, 2002)

Bit Flip Injection in Processor-Based Architectures: A Case Study. - Gian Carlo Cardarilli; F. Kaddour; A. Leandri; Marco Ottavi; Salvatore Pontarelli; Raoul Velazco (IOLTW, 2002)

Error Rate Estimation for a Flight Application Using the CEU Fault Injection Approach. - F. Kaddour; Sana Rezgui; Raoul Velazco; S. Rodriguez; J. R. De Mingo (IOLTW, 2002)

Injecting Multiple Upsets in a SEU Tolerant 8051 Micro-Controller. - Fernanda Gusmão de Lima Kastensmidt; Luigi Carro; Raoul Velazco; Ricardo Augusto da Luz Reis (IOLTW, 2002)

A Software Fault Tolerance Method for Safety-Critical Systems: Effectiveness and Drawbacks. - Bogdan Nicolescu; Raoul Velazco; Matteo Sonza Reorda; Maurizio Rebaudengo; Massimo Violante (SBCCI, 2002)

Detecting Soft Errors by a Purely Software Approach: Method, Tools and Experimental Results. - Bogdan Nicolescu; Raoul Velazco (Embedded Software for SoC, 2003)

Detecting Soft Errors by a Purely Software Approach: Method, Tools and Experimental Results. - Bogdan Nicolescu; Raoul Velazco (DATE, 2003)

Preliminary Validation of an Approach Dealing with Processor Obsolescence. - Lorena Anghel; Raoul Velazco; S. Saleh; S. Deswaertes; A. El Moucary (DFT, 2003)

Efficiency of Transient Bit-Flips Detection by Software Means: A Complete Study. - Bogdan Nicolescu; Paul Peronnard; Raoul Velazco; Yvon Savaria (DFT, 2003)

SIED: Software Implemented Error Detection. - Bogdan Nicolescu; Yvon Savaria; Raoul Velazco (DFT, 2003)

Radiation test methodology for SRAM-based FPGAs by using THESIC. - Monica Alderighi; Fabio Casini; Sergio D'Angelo; F. Faure; Marcello Mancini; Sandro Pastore; Giacomo R. Sechi; Raoul Velazco (IOLTS, 2003)

A Methodology for Test Replacement Solutions of Obsolete Processors. - Raoul Velazco; Lorena Anghel; S. Saleh (IOLTS, 2003)

Assessing the Soft Error Rate of Digital Architectures Devoted to Operate in Radiation Environment: A Case Studied. - Raoul Velazco; Sana Rezgui; Haissam Ziade (J. Electron. Test., 2003)

Coupling Different Methodologies to Validate Obsolete Microprocessors. - Lorena Anghel; Ernesto Sánchez 001; Matteo Sonza Reorda; Giovanni Squillero; Raoul Velazco (DFT, 2004)

Performance Evaluation and Failure Rate Prediction for the Soft Implemented Error Detection Technique. - Bogdan Nicolescu; Yvon Savaria; Raoul Velazco (IOLTS, 2004)

A Survey on Fault Injection Techniques. - Haissam Ziade; Rafic A. Ayoubi; Raoul Velazco (Int. Arab J. Inf. Technol., 2004)

How to Characterize the Problem of SEU in Processors and Representative Errors Observed on Flight. - Raoul Velazco; R. Ecoffet; F. Faure (IOLTS, 2005)

Dynamic Testing of an SRAM-Based FPGA by Time-Resolved Laser Fault Injection. - Vincent Pouget; Alexandre Douin; Gilles Foucard; Paul Peronnard; Dean Lewis; Pascal Fouillat; Raoul Velazco (IOLTS, 2008)

A generic platform for remote accelerated tests and high altitude SEU experiments on advanced ICs: Correlation with MUSCA SEP3 calculations. - Guillaume Hubert; Raoul Velazco; Paul Peronnard (IOLTS, 2009)

Test and qualification of a Fault Tolerant FPGA based Active Antenna System for space applications. - Ezequiel Brac; Pablo A. Ferreyra; Raoul Velazco; Carlos A. Marqués (LATW, 2009)

Bit-flip injection strategies for FSMs modeled in VHDL behavioral level. - John M. Espinosa-Duran; Vladimir Trujillo-Olaya; Jaime Velasco-Medina; Raoul Velazco (LATW, 2010)

Dependability validation of a cryptoprocessor to SEU effects. - Vladimir Trujillo-Olaya; John M. Espinosa-Duran; Jaime Velasco-Medina; Raoul Velazco (LATW, 2010)

Robustness with respect to SEUs of a self-converging algorithm. - Raoul Velazco; Gilles Foucard; Fabrice Pancher; Wassim Mansour; Greicy Marques-Costa; Devan Sohier; Alain Bui (LATW, 2011)

An Optimal Implementation on FPGA of a Hopfield Neural Network. - Wassim Mansour; Rafic A. Ayoubi; Haissam Ziade; Raoul Velazco; Wassim El Falou (Adv. Artif. Neural Syst., 2011)

Reliability Limits of TMR Implemented in a SRAM-based FPGA: Heavy Ion Measures vs. Fault Injection Predictions. - Gilles Foucard; Paul Peronnard; Raoul Velazco (J. Electron. Test., 2011)

A new fault injection approach to study the impact of bitflips in the configuration of SRAM-based FPGAs. - Haissam Ziade; Rafic A. Ayoubi; Raoul Velazco; Tareck Idriss (Int. Arab J. Inf. Technol., 2011)

Fault-tolerance capabilities of a software-implemented Hopfield Neural Network. - Wassim Mansour; Raoul Velazco; Rafic Ayoubi; Wassim El Falou; Haissam Ziade (ICCIT, 2013)

Optimization of a self-converging algorithm at assembly level to improve SEU fault-tolerance. - Greicy Marques-Costa; Wassim Mansour; Fabrice Pancher; Raoul Velazco; Alain Bui; Devan Sohier (LASCAS, 2013)

SEU Fault-Injection in VHDL-Based Processors: A Case Study. - Wassim Mansour; Raoul Velazco (J. Electron. Test., 2013)

Two complementary approaches for studying the effects of SEUs on HDL-based designs. - Wassim Mansour; Miguel A. Aguirre; Hipólito Guzmán-Miranda; Javier Barrientos Rojas; Raoul Velazco (IOLTS, 2014)

Preliminary results of SEU fault-injection on multicore processors in AMP mode. - Vanessa Vargas; Pablo Ramos; Wassim Mansour; Raoul Velazco; Nacer-Eddine Zergainoh; Jean-François Méhaut (IOLTS, 2014)

SEU fault-injection at system level: Method, tools and preliminary results. - Wassim Mansour; Pablo Ramos; Rafic A. Ayoubi; Raoul Velazco (LATW, 2014)

An automated fault injection for evaluation of LUTs robustness in SRAM-based FPGAs. - Anis Souari; Claude Thibeault; Yves Blaquière; Raoul Velazco (EWDTS, 2015)

Optimization of SEU emulation on SRAM FPGAs based on sensitiveness analysis. - Anis Souari; Claude Thibeault; Yves Blaquière; Raoul Velazco (IOLTS, 2015)

Evaluating SEU fault-injection on parallel applications implemented on multicore processors. - Vanessa Vargas; Pablo Ramos; Raoul Velazco; Jean-François Méhaut; Nacer-Eddine Zergainoh (LASCAS, 2015)

A deep analysis of SEU consequences in the internal memory of LEON3 processor. - Afef Kchaou; W. El Hadj Youssef; Rached Tourki; Fraidy Bouesse; Pablo Ramos; Raoul Velazco (LATS, 2016)

Internetworking approaches towards along-track segmented satellite architectures. - Juan A. Fraire; Pablo G. Madoery; Jorge M. Finochietto; Pablo A. Ferreyra; Raoul Velazco (WiSEE, 2016)

Hardware implementation of a fault-tolerant Hopfield Neural Network on FPGAs. - Juan Antonio Clemente; Wassim Mansour; Rafic Ayoubi; Felipe Serrano 002; Hortensia Mecha; Haissam Ziade; Wassim El Falou; Raoul Velazco (Neurocomputing, 2016)

Towards an efficient SEU effects emulation on SRAM-based FPGAs. - Anis Souari; Claude Thibeault; Yves Blaquière; Raoul Velazco (Microelectron. Reliab., 2016)

Low cost rollback to improve fault-tolerance in VLSI circuits. - Thierry Bonnoit; Nacer-Eddine Zergainoh; Michael Nicolaidis; Raoul Velazco (LASCAS, 2017)

SEU impact in processor's control-unit: Preliminary results obtained for LEON3 soft-core. - Thierry Bonnoit; Alexandre Coelho; Nacer-Eddine Zergainoh; Raoul Velazco (LATS, 2017)

Preliminary results of NETFI-2: An automatic method for fault injection on HDL-based designs. - M. Solinas; Alexandre Coelho; Juan A. Fraire; Nacer-Eddine Zergainoh; Pablo A. Ferreyra; Raoul Velazco (LATS, 2017)

Assessing Contact Graph Routing Performance and Reliability in Distributed Satellite Constellations. - Juan A. Fraire; Pablo G. Madoery; Scott C. Burleigh; Marius Feldmann; Jorge M. Finochietto; Amir Charif; Nacer-Eddine Zergainoh; Raoul Velazco (J. Comput. Networks Commun., 2017)

A soft-error resilient route computation unit for 3D Networks-on-Chips. - Alexandre Coelho; Amir Charif; Nacer-Eddine Zergainoh; Juan A. Fraire; Raoul Velazco (DATE, 2018)

A Runtime Fault-Tolerant Routing Scheme for Partially Connected 3D Networks-on-Chip. - Alexandre Coelho; Amir Charif; Nacer-Eddine Zergainoh; Raoul Velazco (DFT, 2018)

NoCFI: A Hybrid Fault Injection Method for Networks-On-Chip. - Alexandre Coelho; Nacer-Eddine Zergainoh; Raoul Velazco (LATS, 2019)

Delay-Tolerant Wireless Networks on Chip: Preliminary Analysis and Results. - Pablo A. Ferreyra; Juan A. Fraire; Fabian Gomez; Raoul Velazco; Daniel Sánchez 013; Dardo Vinas Viscardi (LATS, 2019)

A Wireless Embedded System for Measuring the Effects of Ionizing Radiations. - Daniel Sánchez 013; Pablo A. Ferreyra; Juan A. Fraire; Fabian Gomez; Raoul Velazco; Dardo Vinas Viscardi (LATS, 2019)

Evaluation of Attitude Estimation Algorithm under Soft Error Effects. - João Paulo Brum; T. Kraemer Sartori; J. Lin; Matheus Garay Trindade; Hassen Fourati; Raoul Velazco; Rodrigo Possamai Bastos (LATS, 2021)

Nanosatellite On-Board Computer including a Many-Core Processor. - Fabrice Pancher; Vanessa Vargas; Pablo Ramos; Rodrigo Possamai Bastos; David César Ardiles Saravia; Raoul Velazco (LATS, 2021)