Representing Knowledge for Planning Multisentential Text. - José Coch; Raphaël David (ANLP, 1994)

A Dynamically Reconfigurable Architecture for Low-Power Multimedia Terminals. - Raphaël David; Daniel Chillet; Sébastien Pillement; Olivier Sentieys (VLSI-SOC, 2001)

A Compilation Framework for a Dynamically Reconfigurable Architecture. - Raphaël David; Daniel Chillet; Sébastien Pillement; Olivier Sentieys (FPL, 2002)

Mapping future generation mobile telecommunication applications on a dynamically reconfigurable arcidtecture. - Raphaël David; Daniel Chillet; Sébastien Pillement; Olivier Sentieys (ICASSP, 2002)

DART: A Dynamically Reconfigurable Architecture Dealing with Future Mobile Telecommunications Constraints. - Raphaël David; Daniel Chillet; Sébastien Pillement; Olivier Sentieys (IPDPS, 2002)

Du microprocesseur au circuit FPGA. Une analyse sous l'angle de la reconfiguration. - Raphaël David; Dominique Lavenier; Sébastien Pillement (Tech. Sci. Informatiques, 2005)

Control Unit for Parallel Embedded System. - Stéphane Chevobbe; Raphaël David; Frédéric Blanc 001; Thierry Collette; Olivier Sentieys (ReCoSoC, 2006)

Architectures reconfigurable et faible consommation. Réalité ou prospective ? - Sébastien Pillement; Raphaël David (Tech. Sci. Informatiques, 2007)

DART: A Functional-Level Reconfigurable Architecture for High Energy Efficiency. - Sébastien Pillement; Olivier Sentieys; Raphaël David (EURASIP J. Embed. Syst., 2008)

Structure mémoire reconfigurable. Vers une structure de stockage faible consommation. - Daniel Chillet; Raphaël David; Erwan Grâce; Olivier Sentieys (Tech. Sci. Informatiques, 2008)

Reconfigurable Operator Based Multimedia Embedded Processor. - Daniel Ménard; Emmanuel Casseau; Shafqat Khan; Olivier Sentieys; Stéphane Chevobbe; Stéphane Guyetant; Raphaël David (ARC, 2009)

Approximate-Timed Transactional Level Modeling for MPSoC Exploration: A Network-on-Chip Case Study. - Alexandre Guerre; Nicolas Ventroux; Raphaël David; Alain Mérigot (DSD, 2009)

Reconfiguration Level Analysis of FFT / FIR Units in Wireless Telecommunication Systems. - Maroun Ojail; Raphaël David; Stéphane Chevobbe; Didier Demigny (DSD, 2009)

A reconfigurable FIR/FFT unit for wireless telecommunication systems. - Maroun Ojail; Raphaël David; Stéphane Chevobbe; Didier Demigny (FPL, 2009)

SESAM: An MPSoC Simulation Environment for Dynamic Application Processing. - Nicolas Ventroux; Alexandre Guerre; Tanguy Sassolas; L. Moutaoukil; Guillaume Blanc; Charly Bechara; Raphaël David (CIT, 2010)

CERA: A Channel Estimation Reconfigurable Architecture. - Céline Azar; Maroun Ojail; Stéphane Chevobbe; Raphaël David (ICT, 2010)

SCMP architecture: an asymmetric multiprocessor system-on-chip for dynamic applications. - Nicolas Ventroux; Raphaël David (IFMT, 2010)

Hierarchical Network-on-Chip for Embedded Many-Core Architectures. - Alexandre Guerre; Nicolas Ventroux; Raphaël David; Alain Mérigot (NOCS, 2010)

SESAM extension for fast MPSoC architectural exploration and dynamic streaming applications. - Nicolas Ventroux; Tanguy Sassolas; Raphaël David; Guillaume Blanc; Alexandre Guerre; Charly Bechara (VLSI-SoC, 2010)

Les architectures parallèles sur puce. Synthèse des architectures multitâches pour les systèmes embarqués. - Nicolas Ventroux; Raphaël David (Tech. Sci. Informatiques, 2010)

Impact of power management on temperature and reliability evolution for an embedded many-core architecture. - M. Alexandre Carbon; Olivier Héron; Karim Ben Chehida; Raphaël David (ARCS Workshops, 2011)

Synchronous Reactive Fine Grain Tasks Management for Homogeneous Many-Core Architectures. - Maroun Ojail; Raphaël David; Karim Ben Chehida; Yves Lhuillier; Luca Benini (ARCS Workshops, 2011)

Graphic rendering application profiling on a shared memory MPSOC architecture. - Matthieu Texier; Raphaël David; Karim Ben Chehida; Olivier Sentieys (DASIP, 2011)

Designing processors using MAsS, a modular and lightweight instruction-level exploration tool. - Matthieu Texier; Erwan Piriou; Mathieu Thevenin; Raphaël David (DASIP, 2011)

A small footprint interleaved multithreaded processor for embedded systems. - Charly Bechara; Aurelien Berhault; Nicolas Ventroux; Stéphane Chevobbe; Yves Lhuillier; Raphaël David; Daniel Etiemble (ICECS, 2011)

ARTM: a lightweight fork-join framework for many-core embedded systems. - Maroun Ojail; Raphaël David; Yves Lhuillier; Alexandre Guerre (DATE, 2013)

A fast and accurate methodology for power estimation and reduction of programmable architectures. - Erwan Piriou; Raphaël David; Fahim Rahim; Solaiman Rahim (DATE, 2013)

An efficient and flexible hardware support for accelerating synchronization operations on the STHORM many-core architecture. - Farhat Thabet; Yves Lhuillier; Caaliph Andriamisaina; Jean-Marc Philippe; Raphaël David (DATE, 2013)

When processors get old: Evaluation of BTI and HCI effects on performance and reliability. - Chiara Sandionigi; Olivier Héron; Clement Bertolini; Raphaël David (IOLTS, 2013)

HARS: A hardware-assisted runtime software for embedded many-core architectures. - Yves Lhuillier; Maroun Ojail; Alexandre Guerre; Jean-Marc Philippe; Karim Ben Chehida; Farhat Thabet; Caaliph Andriamisaina; Chafic Jaber; Raphaël David (ACM Trans. Embed. Comput. Syst., 2014)