A 40nm 650Mhz 0.5fJ/Bit/Search TCAM Compiler Using Complementary Bit-cell Architecture. - Rashmi Sachan; Shahid Ali; Chandan Bist; Sunil Misra; Vinod Menezes; Sharad Gupta; Pat Bosshart (VLSI Design, 2013)

A Multibit MAC Scheme using Switched Capacitor based 3C Multiplier for Analog Compute In-Memory Architecture. - Neha Gupta; Ashish Joshi; Dinesh Kushwaha; Vinod Menezes; Rashmi Sachan; Sudeb Dasgupta; Anand Bulusu (ICECS 2022, 2022)