A light-weight statically scheduled network-on-chip. - Rasmus Bo Sørensen; Martin Schoeberl; Jens Sparsø (NORCHIP, 2012)

Router Designs for an Asynchronous Time-Division-Multiplexed Network-on-Chip. - Evangelia Kasapaki; Jens Sparsø; Rasmus Bo Sørensen; Kees Goossens (DSD, 2013)

A Metaheuristic Scheduler for Time Division Multiplexed Networks-on-Chip. - Rasmus Bo Sørensen; Jens Sparsø; Mark Ruvald Pedersen; Jaspur Hojgaard (ISORC, 2014)

A loosely synchronizing asynchronous router for TDM-scheduled NOCs. - I. Kotleas; D. Humphreys; Rasmus Bo Sørensen; Evangelia Kasapaki; Florian Brandner; Jens Sparsø (NOCS, 2014)

Synthesis and layout of an asynchronous network-on-chip using Standard EDA tools. - Christoph Thomas Muller; Evangelia Kasapaki; Rasmus Bo Sørensen; Jens Sparsø (NORCHIP, 2014)

Models of Communication for Multicore Processors. - Martin Schoeberl; Rasmus Bo Sørensen; Jens Sparsø (ISORC Workshops, 2015)

Message Passing on a Time-predictable Multicore Processor. - Rasmus Bo Sørensen; Wolfgang Puffitsch; Martin Schoeberl; Jens Sparsø (ISORC, 2015)

Interfacing hardware accelerators to a time-division multiplexing network-on-chip. - Luca Pezzarossa; Rasmus Bo Sørensen; Martin Schoeberl; Jens Sparsø (NORCAS, 2015)

Time-division multiplexing vs network calculus: a comparison. - Wolfgang Puffitsch; Rasmus Bo Sørensen; Martin Schoeberl (RTNS, 2015)

An area-efficient TDM NoC supporting reconfiguration for mode changes. - Rasmus Bo Sørensen; Luca Pezzarossa; Jens Sparsø (NOCS, 2016)

Avionics Applications on a Time-Predictable Chip-Multiprocessor. - André Rocha; Cláudio Silva 002; Rasmus Bo Sørensen; Jens Sparsø; Martin Schoeberl (PDP, 2016)

State-based Communication on Time-predictable Multicore Processors. - Rasmus Bo Sørensen; Martin Schoeberl; Jens Sparsø (RTNS, 2016)

TACLeBench: A Benchmark Collection to Support Worst-Case Execution Time Research. - Heiko Falk; Sebastian Altmeyer; Peter Hellinckx; Björn Lisper; Wolfgang Puffitsch; Christine Rochange; Martin Schoeberl; Rasmus Bo Sørensen; Peter Wägemann; Simon Wegener (WCET, 2016)

Argo: A Real-Time Network-on-Chip Architecture With an Efficient GALS Implementation. - Evangelia Kasapaki; Martin Schoeberl; Rasmus Bo Sørensen; Christoph Thomas Muller; Kees Goossens; Jens Sparsø (IEEE Trans. Very Large Scale Integr. Syst., 2016)

Time-Predictable Communication on a Time-Division Multiplexing Network-on-Chip Multicore. - Rasmus Bo Sørensen (2016)

A resource-efficient network interface supporting low latency reconfiguration of virtual circuits in time-division multiplexing networks-on-chip. - Rasmus Bo Sørensen; Luca Pezzarossa; Martin Schoeberl; Jens Sparsø (J. Syst. Archit., 2017)