Design of high throughput asynchronous FIR filter using gate level pipelined multipliers and adders. - K. Sravani; Rathnamala Rao (Int. J. Circuit Theory Appl., 2020)

A High Performance Early Acknowledged Asynchronous Pipeline using Hybrid-logic Encoding. - K. Sravani; Rathnamala Rao (Integr., 2020)

Experimental Investigations on Flexurally amplified piezoactuator based Active vibration Isolation System using PID controller. - P. Divijesh Puninchathaya; Muralidhara Rao; Rathnamala Rao; Sushith Kumar; Rehna M. Ahmed (Mechatron. Syst. Control., 2021)

An Exploration of the Effective Path for Current Conduction in a Triple Gate Junctionless FinFET. - Sriraj Chennamadhavuni; Shara Mathew; Rathnamala Rao (TENCON, 2023)

Design and Verification of an Asynchronous NoC Router Architecture for GALS Systems. - M. N. Saranya; Rathnamala Rao (J. Electron. Test., 2024)