Towards minimizing execution delays on dynamically reconfigurable processors: a case study on REDEFINE. - Ratna Krishnamoorthy; Keshavan Varadarajan; Ganesh Garga; Mythri Alle; S. K. Nandy 001; Ranjani Narayan; Masahiro Fujita (CASES, 2010)

Dataflow Graph Partitioning for Optimal Spatio-Temporal Computation on a Coarse Grain Reconfigurable Architecture. - Ratna Krishnamoorthy; Keshavan Varadarajan; Masahiro Fujita; Mythri Alle; S. K. Nandy 001; Ranjani Narayan (ARC, 2011)

Interconnect-topology independent mapping algorithm for a Coarse Grained Reconfigurable Architecture. - Ratna Krishnamoorthy; Masahiro Fujita; Keshavan Varadarajan; S. K. Nandy 001 (FPT, 2011)

Data Flow Graph Partitioning Algorithms and Their Evaluations for Optimal Spatio-temporal Computation on a Coarse Grain Reconfigurable Architecture. - Ratna Krishnamoorthy; Saptarsi Das; Keshavan Varadarajan; Mythri Alle; Masahiro Fujita; Soumitra Kumar Nandy; Ranjani Narayan (IPSJ Trans. Syst. LSI Des. Methodol., 2011)

Optimizing and Auto-Tuning Iterative Stencil Loops for GPUs with the In-Plane Method. - Wai Teng Tang; Wen Jun Tan; Ratna Krishnamoorthy; Yi Wen Wong; Shyh-Hao Kuo; Rick Siow Mong Goh; Stephen John Turner; Weng-Fai Wong (IPDPS, 2013)