A 1.6Gb/s CMOS LVDS transmitter with a programmable pre-emphasis system. - Benjamín T. Reyes; German Paulina; Lucas Tealdi; Emanuel Labat; Raul M. Sanchez; Pablo Sergio Mandolesi; Mario Rafael Hueda (LASCAS, 2014)

A 6-bit 2GS/s CMOS time-interleaved ADC for analysis of mixed-signal calibration techniques. - Benjamín T. Reyes; Lucas Tealdi; German Paulina; Emanuel Labat; Raul M. Sanchez; Pablo Sergio Mandolesi; Mario Rafael Hueda (LASCAS, 2014)

An FPGA-based emulation platform for evaluation of time-interleaved ADC calibration systems. - Raul M. Sanchez; Benjamín T. Reyes; Ariel L. Pola; Mario Rafael Hueda (LASCAS, 2016)

Design and Experimental Evaluation of a Time-Interleaved ADC Calibration Algorithm for Application in High-Speed Communication Systems. - Benjamín T. Reyes; Raul M. Sanchez; Ariel L. Pola; Mario R. Hueda (IEEE Trans. Circuits Syst. I Regul. Pap., 2017)