BSIM-BULK: Accurate Compact Model for Analog and RF Circuit Design. - Chetan Gupta; Ravi Goel; Harshit Agarwal; Chenming Hu; Yogesh Singh Chauhan (CICC, 2019)

Improved modeling of flicker noise including velocity saturation effect in FinFETs and experimental validation. - Ravi Goel; Weike Wang; Yogesh Singh Chauhan (Microelectron. J., 2021)

Robust Compact Model of High-Voltage MOSFET's Drift Region. - Girish Pahwa; Ayushi Sharma; Ravi Goel; Garima Gill; Harshit Agarwal; Yogesh Singh Chauhan; Chenming Hu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)