Control and Data Flow Graph Extraction for High-Level Synthesis. - Ravi Namballa; Nagarajan Ranganathan; Abdel Ejnioui (ISVLSI, 2004)

VLSI Implementation of Visible Watermarking for a Secure Digital Still Camera Design. - Saraju P. Mohanty; Nagarajan Ranganathan; Ravi Namballa (VLSI Design, 2004)

An object-oriented simulation framework for real-time control of automated flexible manufacturing systems. - Ali Yalcin; Ravi Namballa (Comput. Ind. Eng., 2005)

A VLSI architecture for watermarking in a secure still digital camera (S2DC) design. - Saraju P. Mohanty; Nagarajan Ranganathan; Ravi Namballa (IEEE Trans. Very Large Scale Integr. Syst., 2005)

A VLSI architecture for visible watermarking in a secure still digital camera (S2/DC) design (Corrected)*. - Saraju P. Mohanty; Nagarajan Ranganathan; Ravi Namballa (IEEE Trans. Very Large Scale Integr. Syst., 2005)

CHESS: A Comprehensive Tool for CDFG Extraction and Synthesis of Low Power Designs from VHDL. - Nagarajan Ranganathan; Ravi Namballa; Narender Hanchate (ISVLSI, 2006)