Design of ultra high-speed CMOS CML buffers and latches. - Payam Heydari; Ravindran Mohanavelu (ISCAS (2), 2003)

A novel ultra high-speed flip-flop-based frequency divider. - Ravindran Mohanavelu; Payam Heydari (ISCAS (4), 2004)

Design of ultrahigh-speed low-voltage CMOS CML buffers and latches. - Payam Heydari; Ravindran Mohanavelu (IEEE Trans. Very Large Scale Integr. Syst., 2004)

A novel 40-GHz flip-flop-based frequency divider in 0.18μm CMOS. - Ravindran Mohanavelu; Payam Heydari (ESSCIRC, 2005)

A 40-GHz Flip-Flop-Based Frequency Divider. - Payam Heydari; Ravindran Mohanavelu (IEEE Trans. Circuits Syst. II Express Briefs, 2006)

A 78mW 11.8Gb/s serial link transceiver with adaptive RX equalization and baud-rate CDR in 32nm CMOS. - Fulvio Spagna; Lidong Chen; Mamatha Deshpande; Yongping Fan; Doug Gambetta; Sujatha Gowder; Sitaraman Iyer; Rohit Kumar; Peter Kwok; Renuka Krishnamurthy; Chien-chun Lin; Ravindran Mohanavelu; et al. (ISSCC, 2010)

3.4 A 40/50/100Gb/s PAM-4 Ethernet transceiver in 28nm CMOS. - Karthik Gopalakrishnan; Alan Ren; Amber Tan; Arash Farhood; Arun Tiruvur; Belal Helal; Chang-Feng Loi; Chris Jiang; Halil Cirit; Irene Quek; Jamal Riani; James Gorecki; et al. (ISSCC, 2016)

A 400Gb/s Transceiver for PAM-4 Optical Direct-Detect Application in 16nm FinFET. - Chang-Feng Loi; A. Mellati; Amber Tan; A. Farhoodfar; Arun Tiruvur; Belal Helal; Bob Killips; Farshid Rafiee Rad; Jamal Riani; Jorge Pernillo; J. Sun; J. Wong; et al. (ISSCC, 2019)