HLSpower: Hybrid Statistical Modeling of the Superscalar Power-Performance Design Space. - Ravishankar Rao; Mark Oskin; Frederic T. Chong (HiPC, 2002)

Analysis of discharge techniques for multiple battery systems. - Ravishankar Rao; Sarma B. K. Vrudhula; Daler N. Rakhmatov (ISLPED, 2003)

Synchroscalar: Initial Lessons in Power-Aware Design of a Tile-Based Embedded Architecture. - John Y. Oliver; Ravishankar Rao; Paul Sultana; Jedidiah R. Crandall; Erik Czernikowski; Leslie W. Jones IV; Dean Copsey; Diana Keen; Venkatesh Akella; Frederic T. Chong (PACS, 2003)

Battery Modeling for Energy-Aware System Design. - Ravishankar Rao; Sarma B. K. Vrudhula; Daler N. Rakhmatov (Computer, 2003)

Disk drive energy optimization for audio-video applications. - Ravishankar Rao; Sarma B. K. Vrudhula; Musaravakkam S. Krishnan (CASES, 2004)

Energy optimization for a two-device data flow chain. - Ravishankar Rao; Sarma B. K. Vrudhula (ICCAD, 2004)

Synchroscalar: A Multiple Clock Domain, Power-Aware, Tile-Based Embedded Processor. - John Y. Oliver; Ravishankar Rao; Paul Sultana; Jedidiah R. Crandall; Erik Czernikowski; Leslie W. Jones IV; Diana Franklin; Venkatesh Akella; Frederic T. Chong (ISCA, 2004)

An efficient combinationality check technique for the synthesis of cyclic combinational circuits. - Vineet Agarwal; Navneeth Kankani; Ravishankar Rao; Sarvesh Bhardwaj; Janet Meiling Wang (ASP-DAC, 2005)

Energy optimal speed control of devices with discrete speed sets. - Ravishankar Rao; Sarma B. K. Vrudhula (DAC, 2005)

Battery optimization vs energy optimization: which to choose and when? - Ravishankar Rao; Sarma B. K. Vrudhula (ICCAD, 2005)

Tile size selection for low-power tile-based architectures. - John Y. Oliver; Ravishankar Rao; Michael Brown; Jennifer Mankin; Diana Franklin; Frederic T. Chong; Venkatesh Akella (Conf. Computing Frontiers, 2006)

Segmented Bitline Cache: Exploiting Non-uniform Memory Access Patterns. - Ravishankar Rao; Justin Wenck; Diana Franklin; Rajeevan Amirtharajah; Venkatesh Akella (HiPC, 2006)

An optimal analytical solution for processor speed control with thermal constraints. - Ravishankar Rao; Sarma B. K. Vrudhula; Chaitali Chakrabarti; Naehyuck Chang (ISLPED, 2006)

Synchroscalar: Evaluation of an embedded, multi-core architecture for media applications. - John Y. Oliver; Ravishankar Rao; Diana Franklin; Frederic T. Chong; Venkatesh Akella (J. Embed. Comput., 2006)

Energy-Optimal Speed Control of a Generic Device. - Ravishankar Rao; Sarma B. K. Vrudhula (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006)

Performance optimal processor throttling under thermal constraints. - Ravishankar Rao; Sarma B. K. Vrudhula (CASES, 2007)

Throughput of multi-core processors under thermal constraints. - Ravishankar Rao; Sarma B. K. Vrudhula; Chaitali Chakrabarti (ISLPED, 2007)

Energy optimal speed control of a producer-consumer device pair. - Ravishankar Rao; Sarma B. K. Vrudhula (ACM Trans. Embed. Comput. Syst., 2007)

Efficient online computation of core speeds to maximize the throughput of thermally constrained multi-core processors. - Ravishankar Rao; Sarma B. K. Vrudhula (ICCAD, 2008)

Analytical results for design space exploration of multi-core processors employing thread migration. - Ravishankar Rao; Sarma B. K. Vrudhula; Krzysztof S. Berezowski (ISLPED, 2008)

Throughput optimal task allocation under thermal constraints for multi-core processors. - Vinay Hanumaiah; Ravishankar Rao; Sarma B. K. Vrudhula; Karam S. Chatha (DAC, 2009)

Fast and Accurate Prediction of the Steady-State Throughput of Multicore Processors Under Thermal Constraints. - Ravishankar Rao; Sarma B. K. Vrudhula (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009)