On improved graph-based alternative wiring scheme for multi-level logic optimization. - Yu-Liang Wu; Chin Ngai Sze; Chak-Chung Cheung; Hongbing Fan (ICECS, 2000)

On Optimum Switch Box Designs for 2-D FPGAs. - Hongbing Fan; Jiping Liu; Yu-Liang Wu; Chak-Chung Cheung (DAC, 2001)

Further improve circuit partitioning using GBAW logic perturbation techniques. - Chak-Chung Cheung; Yu-Liang Wu; David Ihsin Cheng (DATE, 2001)

On Optimum Designs of Universal Switch Blocks. - Hongbing Fan; Jiping Liu; Yu-Liang Wu; Chak-Chung Cheung (FPL, 2002)

An FPGA-based re-configurable 24-bit 96kHz sigma-delta audio DAC. - Ray C. C. Cheung; Kong-Pang Pun; Steve C. L. Yuen; Kuen Hung Tsoi; Philip Heng Wai Leong (FPT, 2003)

On optimal hyperuniversal and rearrangeable switch box designs. - Hongbing Fan; Jiping Liu; Yu-Liang Wu; Chak-Chung Cheung (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003)

Further improve circuit partitioning using GBAW logic perturbation techniques. - Yu-Liang Wu; Chak-Chung Cheung; David Ihsin Cheng; Hongbing Fan (IEEE Trans. Very Large Scale Integr. Syst., 2003)

A System on Chip Design Framework for Prime Number Validation Using Reconfigurable Hardware. - Ray C. C. Cheung (FPL, 2004)

On Optimal Irregular Switch Box Designs. - Hongbing Fan; Yu-Liang Wu; Chak-Chung Cheung; Jiping Liu (FPL, 2004)

A scalable hardware architecture for prime number validation. - Ray C. C. Cheung; Ashley Brown; Wayne Luk; Peter Y. K. Cheung (FPT, 2004)

Customising Hardware Designs for Elliptic Curve Cryptography. - Nicolas Telle; Wayne Luk; Ray C. C. Cheung (SAMOS, 2004)

Automating custom-precision function evaluation for embedded processors. - Ray C. C. Cheung; Dong-U Lee; Oskar Mencer; Wayne Luk; Peter Y. K. Cheung (CASES, 2005)

Reconfigurable Elliptic Curve Cryptosystems on a Chip. - Ray C. C. Cheung; Wayne Luk; Peter Y. K. Cheung (DATE, 2005)

Ziggurat-based Hardware Gaussian Random Number Generator. - Guanglie Zhang; Philip Heng Wai Leong; Dong-U Lee; John D. Villasenor; Ray C. C. Cheung; Wayne Luk (FPL, 2005)

Reconfigurable Acceleration for Monte Carlo Based Financial Simulation. - Guanglie Zhang; Philip Heng Wai Leong; Chun Hok Ho; Kuen Hung Tsoi; Chris C. C. Cheung; Dong-U Lee; Ray C. C. Cheung; Wayne Luk (FPT, 2005)

Customizable elliptic curve cryptosystems. - Ray C. C. Cheung; N. J. Telle; Wayne Luk; Peter Y. K. Cheung (IEEE Trans. Very Large Scale Integr. Syst., 2005)

Inversion-based hardware gaussian random number generator: A case study of function evaluation via hierarchical segmentation. - Dong-U Lee; Ray C. C. Cheung; John D. Villasenor; Wayne Luk (FPT, 2006)

Decomposition Design Theory and Methodology for Arbitrary-Shaped Switch Boxes. - Hongbing Fan; Yu-Liang Wu; Ray Chak-Chung Cheung; Jiping Liu (IEEE Trans. Computers, 2006)

Accuracy-Guaranteed Bit-Width Optimization. - Dong-U Lee; Altaf Abdul Gaffar; Ray C. C. Cheung; Oskar Mencer; Wayne Luk; George A. Constantinides (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006)

Automatic Accuracy-Guaranteed Bit-Width Optimization for Fixed and Floating-Point Systems. - William George Osborne; Ray C. C. Cheung; José Gabriel F. Coutinho; Wayne Luk; Oskar Mencer (FPL, 2007)

Instrumented Multi-Stage Word-Length Optimization. - William George Osborne; José Gabriel F. Coutinho; Ray C. C. Cheung; Wayne Luk; Oskar Mencer (FPT, 2007)

The exact channel density and compound design for generic universal switch blocks. - Hongbing Fan; Jiping Liu; Yu-Liang Wu; Chak-Chung Cheung (ACM Trans. Design Autom. Electr. Syst., 2007)

Hardware Generation of Arbitrary Random Number Distributions From Uniform Distributions Via the Inversion Method. - Ray C. C. Cheung; Dong-U Lee; Wayne Luk; John D. Villasenor (IEEE Trans. Very Large Scale Integr. Syst., 2007)

A Flexible Architecture for Precise Gamma Correction. - Dong-U Lee; Ray C. C. Cheung; John D. Villasenor (IEEE Trans. Very Large Scale Integr. Syst., 2007)

Hardware Implementation Trade-Offs of Polynomial Approximations and Interpolations. - Dong-U Lee; Ray C. C. Cheung; Wayne Luk; John D. Villasenor (IEEE Trans. Computers, 2008)

A High-Performance Hardware Architecture for Spectral Hash Algorithm. - Ray C. C. Cheung; Çetin Kaya Koç; John D. Villasenor (ASAP, 2009)

Hierarchical Segmentation for Hardware Function Evaluation. - Dong-U Lee; Ray C. C. Cheung; Wayne Luk; John D. Villasenor (IEEE Trans. Very Large Scale Integr. Syst., 2009)

Design Automation for Reconfigurable Interconnection Networks. - Hongbing Fan; Yu-Liang Wu; Chak-Chung Cheung (ARC, 2010)

Reconfigurable Number Theoretic Transform architectures for cryptographic applications. - Gavin Xiaoxu Yao; Ray C. C. Cheung; Çetin Kaya Koç; Kim-Fung Man (FPT, 2010)

Counter Embedded Memory architecture for trusted computing platform. - Gavin Xiaoxu Yao; Ray C. C. Cheung; Kim-Fung Man (International Symposium on Rapid System Prototyping, 2010)

FPGA Implementation of Pairings Using Residue Number System and Lazy Reduction. - Ray C. C. Cheung; Sylvain Duquesne; Junfeng Fan; Nicolas Guillermin; Ingrid Verbauwhede; Gavin Xiaoxu Yao (CHES, 2011)

A hardware-based computational platform for Generalized Laguerre-Volterra MIMO model for neural activities. - Will X. Y. Li; Rosa H. M. Chan; Wei Zhang 044; Ray C. C. Cheung; Dong Song; Theodore W. Berger (EMBC, 2011)

FPGA Architecture of Generalized Laguerre-Volterra MIMO Model for Neural Population Spiking Activities. - Will X. Y. Li; Ray C. C. Cheung; Wei Zhang 044; Rosa H. M. Chan; Dong Song; Theodore W. Berger (FCCM, 2011)

FPGA Architecture of Generalized Laguerre-Volterra MIMO Model for Neural Population Activities. - Will X. Y. Li; Rosa H. M. Chan; Wei Zhang 044; C. W. Yu; Ray C. C. Cheung; Dong Song; Theodore W. Berger (FPL, 2011)

Hydrate: Hybrid Reconfigurable Architecture Expressions. - Chi Wai Yu; Fred Cox; Wayne Luk; Ray C. C. Cheung (FPT, 2011)

Rapid single-chip secure processor prototyping on the OpenSPARC FPGA platform. - Jakub Szefer; Wei Zhang 044; Yu-Yuan Chen; David Champagne; King Chan; Will X. Y. Li; Ray C. C. Cheung; Ruby B. Lee (International Symposium on Rapid System Prototyping, 2011)

High-Performance and Scalable System Architecture for the Real-Time Estimation of Generalized Laguerre-Volterra MIMO Model From Neural Population Spiking Activity. - Will X. Y. Li; Rosa H. M. Chan; Wei Zhang 044; Ray C. C. Cheung; Dong Song; Theodore W. Berger (IEEE J. Emerg. Sel. Topics Circuits Syst., 2011)

A High Speed Pairing Coprocessor Using RNS and Lazy Reduction. - Gavin Xiaoxu Yao; Junfeng Fan; Ray C. C. Cheung; Ingrid Verbauwhede (IACR Cryptol. ePrint Arch., 2011)

High Performance Reconfigurable Architecture for Double Precision Floating Point Division. - Manish Kumar Jaiswal; Ray C. C. Cheung (ARC, 2012)

A dual mode FPGA design for the hippocampal prosthesis. - Will X. Y. Li; Rosa H. M. Chan; Dong Song; Theodore W. Berger; Ray C. C. Cheung (EMBC, 2012)

Area-Efficient Architectures for Large Integer and Quadruple Precision Floating Point Multipliers. - Manish Kumar Jaiswal; Ray C. C. Cheung (FCCM, 2012)

Low complexity and hardware-friendly spectral modular multiplication. - Donald Donglong Chen; Gavin Xiaoxu Yao; Çetin Kaya Koç; Ray C. C. Cheung (FPT, 2012)

GPU-Based Biclustering for Neural Information Processing. - Alan W. Y. Lo; Benben Liu; Ray C. C. Cheung (ICONIP (5), 2012)

Area-Efficient FPGA Implementation of Quadruple Precision Floating Point Multiplier. - Manish Kumar Jaiswal; Ray C. C. Cheung (IPDPS Workshops, 2012)

FPGA Implementation of SRAM-based Ternary Content Addressable Memory. - Zahid Ullah 001; Manish Kumar Jaiswal; Y. C. Chan; Ray C. C. Cheung (IPDPS Workshops, 2012)

An FPGA-based acceleration platform for auction algorithm. - Pengfei Zhu; Chun Zhang; Hua Li; Ray C. C. Cheung; Bryan Hu (ISCAS, 2012)

Faster Pairing Coprocessor Architecture. - Gavin Xiaoxu Yao; Junfeng Fan; Ray C. C. Cheung; Ingrid Verbauwhede (Pairing, 2012)

Subthreshold CMOS voltage reference circuit with body bias compensation for process variation. - Hao Luo; Yan Han; Ray C. C. Cheung; Guo Liang; Dazhong Zhu (IET Circuits Devices Syst., 2012)

Hypergraph based geometric biclustering algorithm. - Zhiguan Wang; Chi Wai Yu; Ray C. C. Cheung; Hong Yan 001 (Pattern Recognit. Lett., 2012)

A customizable Stochastic State Point Process Filter (SSPPF) for neural spiking activity. - Yao Xin; Will X. Y. Li; Biao Min; Yan Han; Ray C. C. Cheung (EMBC, 2013)

Binding Hardware IPs to Specific FPGA Device via Inter-twining the PUF Response with the FSM of Sequential Circuits. - Jiliang Zhang 002; Yaping Lin; Yongqiang Lu 001; Ray C. C. Cheung; Wenjie Che; Qiang Zhou 001; Jinian Bian (FCCM, 2013)

Genome sequencing using mapreduce on FPGA with multiple hardware accelerators (abstract only). - Chao Wang 003; Xi Li 003; Xuehai Zhou; Jim Martin 001; Ray C. C. Cheung (FPGA, 2013)

Design space explorations of Hybrid-Partitioned TCAM (HP-TCAM). - Zahid Ullah 001; Manish Kumar Jaiswal; Ray C. C. Cheung (FPL, 2013)

FPGA IP protection by binding Finite State Machine to Physical Unclonable Function. - Jiliang Zhang 002; Yaping Lin; Yongqiang Lyu 001; Gang Qu 001; Ray C. C. Cheung; Wenjie Che; Qiang Zhou 001; Jinian Bian (FPL, 2013)

Fast simulation of Digital Spiking Silicon Neuron model employing reconfigurable dataflow computing. - Will X. Y. Li; Shridhar Chaudhary; Ray C. C. Cheung; Takeshi Matsumoto; Masahiro Fujita (FPT, 2013)

Noise filtering and occurrence identification of mouse ultrasonic vocalization call. - Nancy Yu Song; Jerome Nicon; Biao Min; Ray C. C. Cheung; M. Ashraful Amin; Hong Yan 001 (ICMLC, 2013)

A reconfigurable architecture for real-time prediction of neural activity. - Will X. Y. Li; Ray C. C. Cheung; Rosa H. M. Chan; Dong Song; Theodore W. Berger (ISCAS, 2013)

Design Automation Framework for Reconfigurable Interconnection Networks. - Hongbing Fan; Yu-Liang Wu; Ray C. C. Cheung (Comput. J., 2013)

A memory-based NFA regular expression match engine for signature-based intrusion detection. - Derek Chi-Wai Pao; Nga Lam Or; Ray C. C. Cheung (Comput. Commun., 2013)

VLSI Implementation of Double-Precision Floating-Point Multiplier Using Karatsuba Technique. - Manish Kumar Jaiswal; Ray C. C. Cheung (Circuits Syst. Signal Process., 2013)

A scalable RNS Montgomery multiplier over F2m. - Jingwei Hu; Wei Guo 005; Jizeng Wei; Ray C. C. Cheung (IEICE Electron. Express, 2013)

A σδ modulator using gain-Boost Class-C Inverter for Audio Applications. - Hao Luo; Yan Han; Ray C. C. Cheung; Tianlin Cao; Xiaopeng Liu; Feng Gao (J. Circuits Syst. Comput., 2013)

A 0.8-V 230-µW 98-dB DR Inverter-Based ΣΔ Modulator for Audio Applications. - Hao Luo; Yan Han; Ray C. C. Cheung; Xiaopeng Liu; Tianlin Cao (IEEE J. Solid State Circuits, 2013)

Area-efficient architectures for double precision multiplier on FPGA, with run-time-reconfigurable dual single precision support. - Manish Kumar Jaiswal; Ray C. C. Cheung (Microelectron. J., 2013)

Parallel architecture for DNA sequence inexact matching with Burrows-Wheeler Transform. - Yao Xin; Benben Liu; Biao Min; Will X. Y. Li; Ray C. C. Cheung; Anthony S. Fong; Ting-Fung Chan (Microelectron. J., 2013)

HEALPIX DCT technique for compressing PCA-based illumination adjustable images. - John Sum; Chi-Sing Leung; Ray C. C. Cheung; Tze-Yui Ho (Neural Comput. Appl., 2013)

Real-Time Prediction of Neuronal Population Spiking Activity Using FPGA. - Will X. Y. Li; Ray C. C. Cheung; Rosa H. M. Chan; Dong Song; Theodore W. Berger (IEEE Trans. Biomed. Circuits Syst., 2013)

A Flexible and Customizable Architecture for the Relaxation Labeling Algorithm. - Biao Min; Ray C. C. Cheung; Hong Yan 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2013)

Laguerre-volterra model and architecture for MIMO system identification and output prediction. - Will X. Y. Li; Yao Xin; Rosa H. M. Chan; Dong Song; Theodore W. Berger; Ray C. C. Cheung (EMBC, 2014)

Big data genome sequencing on Zynq based clusters (abstract only). - Chao Wang 003; Xi Li 003; Xuehai Zhou; Yunji Chen; Ray C. C. Cheung (FPGA, 2014)

A complementary architecture for high-speed true random number generator. - Xian Yang; Ray C. C. Cheung (FPT, 2014)

Trade-offs between the sensitivity and the speed of the FPGA-based sequence aligner. - Peng Chen 004; Chao Wang 003; Xi Li 003; Xuehai Zhou; Aili Wang 003; Ray C. C. Cheung (ISIC, 2014)

Time-efficient computation of digit serial Montgomery multiplication. - Wangchen Dai; Huapeng Wu; Ray C. C. Cheung (ISIC, 2014)

VLSI architecture of a high-performance neural spiking activity simulator based on generalized Volterra kernel. - Will X. Y. Li; Yao Xin; Dong Song; Theodore W. Berger; Ray C. C. Cheung (ISIC, 2014)

Zero collision attack and its countermeasures on Residue Number System multipliers. - Marc Stöttinger; Gavin Xiaoxu Yao; Ray C. C. Cheung (ISIC, 2014)

Configurable Architecture for Double/Two-Parallel Single Precision Floating Point Division. - Manish Kumar Jaiswal; Ray C. C. Cheung; M. Balakrishnan; Kolin Paul (ISVLSI, 2014)

A low-power inverter-based ΣΔ analog-to-digital converter for audio applications. - Xiaopeng Liu; Yan Han; Xiaoxia Han; Hao Luo; Ray C. C. Cheung; Tianlin Cao (Sci. China Inf. Sci., 2014)

Series Expansion based Efficient Architectures for Double Precision Floating Point Division. - Manish Kumar Jaiswal; Ray C. C. Cheung; M. Balakrishnan; Kolin Paul (Circuits Syst. Signal Process., 2014)

E-TCAM: An Efficient SRAM-Based Architecture for TCAM. - Zahid Ullah 001; Manish Kumar Jaiswal; Ray C. C. Cheung (Circuits Syst. Signal Process., 2014)

A perfectly current matched charge pump with wide dynamic range for ultra low voltage applications. - Dongdong Zhong; Yan Han; Jun Sun; Qian Zhou; Ray C. C. Cheung; Wenquan Sui (IEICE Electron. Express, 2014)

GPU-based biclustering for microarray data analysis in neurocomputing. - Benben Liu; Yao Xin; Ray C. C. Cheung; Hong Yan 001 (Neurocomputing, 2014)

An FPGA based scalable architecture of a stochastic state point process filter (SSPPF) to track the nonlinear dynamics underlying neural spiking. - Yao Xin; Will X. Y. Li; Ray C. C. Cheung; Rosa H. M. Chan; Hong Yan 001; Dong Song; Theodore W. Berger (Microelectron. J., 2014)

Novel RNS Parameter Selection for Fast Modular Multiplication. - Gavin Xiaoxu Yao; Junfeng Fan; Ray C. C. Cheung; Ingrid Verbauwhede (IEEE Trans. Computers, 2014)

Unified Architecture for Double/Two-Parallel Single Precision Floating Point Adder. - Manish Kumar Jaiswal; Ray C. C. Cheung; M. Balakrishnan; Kolin Paul (IEEE Trans. Circuits Syst. II Express Briefs, 2014)

Design Exploration of Geometric Biclustering for Microarray Data Analysis in Data Mining. - Benben Liu; Chi Wai Yu; Doris Z. Wang; Ray C. C. Cheung; Hong Yan 001 (IEEE Trans. Parallel Distributed Syst., 2014)

Efficient Pairing Computation on Huff Curves. - Haihua Gu; Dawu Gu; WenLu Xie; Ray C. C. Cheung (Cryptologia, 2015)

Architecture Support for Task Out-of-Order Execution in MPSoCs. - Chao Wang 003; Xi Li 003; Junneng Zhang; Peng Chen 004; Yunji Chen; Xuehai Zhou; Ray C. C. Cheung (IEEE Trans. Computers, 2015)

High-Speed Polynomial Multiplication Architecture for Ring-LWE and SHE Cryptosystems. - Donald Donglong Chen; Nele Mentens; Frederik Vercauteren; Sujoy Sinha Roy; Ray C. C. Cheung; Derek Chi-Wai Pao; Ingrid Verbauwhede (IEEE Trans. Circuits Syst. I Regul. Pap., 2015)

Fast and Generic Inversion Architectures Over GF(2m) Using Modified Itoh-Tsujii Algorithms. - Jingwei Hu; Wei Guo 005; Jizeng Wei; Ray C. C. Cheung (IEEE Trans. Circuits Syst. II Express Briefs, 2015)

Configurable Architectures for Multi-Mode Floating Point Adders. - Manish Kumar Jaiswal; B. Sharat Chandra Varma 001; Hayden Kwok-Hay So; M. Balakrishnan; Kolin Paul; Ray C. C. Cheung (IEEE Trans. Circuits Syst. I Regul. Pap., 2015)

An Application Specific Instruction Set Processor (ASIP) for Adaptive Filters in Neural Prosthetics. - Yao Xin; Will X. Y. Li; Zhaorui Zhang; Ray C. C. Cheung; Dong Song; Theodore W. Berger (IEEE ACM Trans. Comput. Biol. Bioinform., 2015)

A Fast CU Size Decision Algorithm for the HEVC Intra Encoder. - Biao Min; Ray C. C. Cheung (IEEE Trans. Circuits Syst. Video Technol., 2015)

Z-TCAM: An SRAM-based Architecture for TCAM. - Zahid Ullah 001; Manish Kumar Jaiswal; Ray C. C. Cheung (IEEE Trans. Very Large Scale Integr. Syst., 2015)

FPGA-Based High-Performance Collision Detection: An Enabling Technique for Image-Guided Robotic Surgery. - Zhaorui Zhang; Yao Xin; Benben Liu; Will X. Y. Li; Kit-Hang Lee; Chun-Fai Ng; Danail Stoyanov; Ray C. C. Cheung; Ka-Wai Kwok (Frontiers Robotics AI, 2016)

An FPGA-Based High-Performance Neural Ensemble Spiking Activity Simulator Utilizing Generalized Volterra Kernel and Complexity Analysis. - Will X. Y. Li; Ray C. C. Cheung; Yao Xin; Dong Song; Theodore W. Berger (J. Circuits Syst. Comput., 2016)

Parameter Space for the Architecture of FFT-Based Montgomery Modular Multiplication. - Donald Donglong Chen; Gavin Xiaoxu Yao; Ray C. C. Cheung; Derek Chi-Wai Pao; Çetin Kaya Koç (IEEE Trans. Computers, 2016)

High DC gain and wide output swing class-C inverter. - Yaya Chen; Yan Han; Shifeng Zhang; Tianlin Cao; Xiaoxia Han; Ray C. C. Cheung (ISOCC, 2017)

Fast HEVC intra coding decision based on statistical cost and corner detection. - Biao Min; Zhe Xu 008; Ray C. C. Cheung (IWSSIP, 2017)

A low power V-band LC VCO with high Q varactor technique in 40 nm CMOS process. - Qian Zhou; Yan Han; Shifeng Zhang; Xiaoxia Han; Lu Jie 001; Ray C. C. Cheung; Guangtao Feng (Sci. China Inf. Sci., 2017)

Area-Time Efficient Architecture of FFT-Based Montgomery Multiplication. - Wangchen Dai; Donald Donglong Chen; Ray C. C. Cheung; Çetin Kaya Koç (IEEE Trans. Computers, 2017)

Area-Time Efficient Computation of Niederreiter Encryption on QC-MDPC Codes for Embedded Hardware. - Jingwei Hu; Ray C. C. Cheung (IEEE Trans. Computers, 2017)

Toward Practical Code-Based Signature: Implementing Fast and Compact QC-LDGM Signature Scheme on Embedded Hardware. - Jingwei Hu; Ray C. C. Cheung (IEEE Trans. Circuits Syst. I Regul. Pap., 2017)

Compact Constant Weight Coding Engines for the Code-Based Cryptography. - Jingwei Hu; Ray C. C. Cheung; Tim Güneysu (IEEE Trans. Circuits Syst. II Express Briefs, 2017)

A Bias-Bounded Digital True Random Number Generator Architecture. - Yao Liu 006; Ray C. C. Cheung; Hei Wong (IEEE Trans. Circuits Syst. I Regul. Pap., 2017)

A Fully Pipelined Hardware Architecture for Intra Prediction of HEVC. - Biao Min; Zhe Xu 008; Ray C. C. Cheung (IEEE Trans. Circuits Syst. Video Technol., 2017)

Lightweight Secure Processor Prototype on FPGA. - Yao Liu 006; Ray C. C. Cheung; Hei Wong (FPL, 2018)

Dynamic Virtual Page-Based Flash Translation Layer With Novel Hot Data Identification and Adaptive Parallelism Management. - Qiwu Luo; Ray C. C. Cheung; Yichuang Sun (IEEE Access, 2018)

Spectral arithmetic in Montgomery modular multiplication. - Wangchen Dai; Ray C. C. Cheung (J. Cryptogr. Eng., 2018)

ASIC Implementation of a Nonlinear Dynamical Model for Hippocampal Prosthesis. - Zhitong Qiao; Yan Han; Xiaoxia Han; Han Xu; Will X. Y. Li; Dong Song; Theodore W. Berger; Ray C. C. Cheung (Neural Comput., 2018)

A fast inter CU decision algorithm for HEVC. - Zhe Xu 008; Biao Min; Ray C. C. Cheung (Signal Process. Image Commun., 2018)

FFT-Based McLaughlin's Montgomery Exponentiation without Conditional Selections. - Wangchen Dai; Donald Donglong Chen; Ray C. C. Cheung; Çetin Kaya Koç (IEEE Trans. Computers, 2018)

High-Speed Discrete Gaussian Sampler With Heterodyne Chaotic Laser Inputs. - Yao Liu 006; Xiao-Zhou Li; Ray C. C. Cheung; Sze-Chun Chan; Hei Wong (IEEE Trans. Circuits Syst. II Express Briefs, 2018)

Bank-selective Strategy for Gate-based Ternary Content-addressable Memory on FPGAs. - Muhammad Irfan 004; Ray C. C. Cheung; Zahid Ullah 001 (ASAP, 2019)

An Efficient Application Specific Instruction Set Processor (ASIP) for Tensor Computation. - Wei-pei Huang; Ray C. C. Cheung; Hong Yan 001 (ASAP, 2019)

Accurate and Compact Convolutional Neural Networks with Trained Binarization. - Zhe Xu 008; Ray C. C. Cheung (BMVC, 2019)

Optimized Polynomial Multiplier Over Commutative Rings on FPGAs: A Case Study on BIKE. - Jingwei Hu; Wen Wang 007; Ray C. C. Cheung; Huaxiong Wang (FPT, 2019)

Reconfigurable RISC-V Secure Processor And SoC Integration. - Zhenya Zang; Yao Liu 006; Ray C. C. Cheung (ICIT, 2019)

High Performance Power-Efficient Gate-Based CAM for Reconfigurable Computing. - Muhammad Irfan 004; Zahid Ullah 001; Ray C. C. Cheung (MSN, 2019)

D-TCAM: A High-Performance Distributed RAM Based TCAM Architecture on FPGAs. - Muhammad Irfan 004; Zahid Ullah 001; Ray C. C. Cheung (IEEE Access, 2019)

High performance hardware architecture for singular spectrum analysis of Hankel tensors. - Wei-pei Huang; Bowen P. Y. Kwan; Weiyang Ding; Biao Min; Ray C. C. Cheung; Liqun Qi 001; Hong Yan 001 (Microprocess. Microsystems, 2019)

A high performance hardware architecture for non-negative tensor factorization. - Biao Min; Wei-pei Huang; Ray C. C. Cheung; Hong Yan 001 (Microelectron. J., 2019)

A robust background initialization algorithm with superpixel motion detection. - Zhe Xu 008; Biao Min; Ray C. C. Cheung (Signal Process. Image Commun., 2019)

Feature Selection Based on Tensor Decomposition and Object Proposal for Night-Time Multiclass Vehicle Detection. - Hulin Kuang; Long Chen 005; Leanne Lai-Hang Chan; Ray C. C. Cheung; Hong Yan 001 (IEEE Trans. Syst. Man Cybern. Syst., 2019)

Dynamic Sparse Training: Find Efficient Sparse Network From Scratch With Trainable Masked Layers. - Junjie Liu; Zhe Xu 008; Runbin Shi; Ray C. C. Cheung; Hayden Kwok-Hay So (ICLR, 2020)

A Highly Parallel Constant-Time Almost-Inverse Algorithm. - Daniele Venier; Ray C. C. Cheung (ICSPCC, 2020)

NetReduce: RDMA-Compatible In-Network Reduction for Distributed DNN Training Acceleration. - Shuo Liu 002; Qiaoling Wang; Junyi Zhang 005; Qinliang Lin; Yao Liu 006; Meng Xu; Ray C. C. Cheung; Jianfei He (CoRR, 2020)

Binary convolutional neural network acceleration framework for rapid system prototyping. - Zhe Xu 008; Ray C. C. Cheung (J. Syst. Archit., 2020)

Compact Code-Based Signature for Reconfigurable Devices With Side Channel Resilience. - Jingwei Hu; Yao Liu 006; Ray C. C. Cheung; Shivam Bhasin; San Ling; Huaxiong Wang (IEEE Trans. Circuits Syst. I Regul. Pap., 2020)

RPE-TCAM: Reconfigurable Power-Efficient Ternary Content-Addressable Memory on FPGAs. - Muhammad Irfan 004; Zahid Ullah 001; Mehdi Hasan Chowdhury; Ray C. C. Cheung (IEEE Trans. Very Large Scale Integr. Syst., 2020)

On the Suitability of Read only Memory for FPGA-Based CAM Emulation Using Partial Reconfiguration. - Muhammad Irfan 004; Kizheppatt Vipin; Ray C. C. Cheung (ARC, 2021)

An FPGA-based MobileNet Accelerator Considering Network Structure Characteristics. - Shun Yan; Zhengyan Liu; Yun Wang; Chenglong Zeng; Qiang Liu 011; Bowen Cheng; Ray C. C. Cheung (FPL, 2021)

Design of a Battery Carrying Barge for Enhancing Autonomous Sailboat's Endurance Capacity. - Cheng Liang 002; Rong Ou; Bairun Lin; Xiaoqiang Ji; Ray C. C. Cheung; Huihuan Qian (RCAR, 2021)

Aero-Hydroponic Agriculture IoT System. - Henry C. K. Tang; Tiger Y. S. Cheng; Joe C. Y. Wong; Ray C. C. Cheung; Alan H. F. Lam (WF-IoT, 2021)

LoRaWAN-based Camera with (CIRA) Compression and Image Recovery Algorithm. - John Y. Q. Zhang; Ben L. Yeung; Joe C. Y. Wong; Ray C. C. Cheung; Alan H. F. Lam (WF-IoT, 2021)

Efficient High-Performance FPGA-Redis Hybrid NoSQL Caching System for Blockchain Scalability. - Abdurrashid Ibrahim Sanka; Mehdi Hasan Chowdhury; Ray C. C. Cheung (Comput. Commun., 2021)

A survey of breakthrough in blockchain technology: Adoptions, applications, challenges and future research. - Abdurrashid Ibrahim Sanka; Muhammad Irfan 004; Ian Huang; Ray C. C. Cheung (Comput. Commun., 2021)

Accelerated Updating Mechanisms for FPGA-Based Ternary Content-Addressable Memory. - Muhammad Irfan 004; Zahid Ullah 001; Abdurrashid Ibrahim Sanka; Ray C. C. Cheung (IEEE Embed. Syst. Lett., 2021)

A systematic review of blockchain scalability: Issues, solutions, analysis and future research. - Abdurrashid Ibrahim Sanka; Ray C. C. Cheung (J. Netw. Comput. Appl., 2021)

Scalable Fully Pipelined Hardware Architecture for In-Network Aggregated AllReduce Communication. - Yao Liu 006; Junyi Zhang 005; Shuo Liu 002; Qiaoling Wang; Wangchen Dai; Ray Chak-Chung Cheung (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

Elastic Net Constraint-Based Tensor Model for High-Order Graph Matching. - Hu Zhu; Chunfeng Cui; Lizhen Deng; Ray C. C. Cheung; Hong Yan 001 (IEEE Trans. Cybern., 2021)

An Efficient Parallel Processor for Dense Tensor Computation. - Wei-pei Huang; Ray C. C. Cheung; Hong Yan 001 (IEEE Trans. Very Large Scale Integr. Syst., 2021)

A High-Performance FPGA Accelerator for CUR Decomposition. - Muhammad A. A. Abdelgawad; Ray C. C. Cheung; Hong Yan 001 (FPL, 2022)

Preface. - Yun Liang 001; Hiroki Nakahara; Wei Zhang 012; Fubing Mao; Ray C. C. Cheung (FPT, 2022)

Message from the General Chair and Program Co-Chairs. - Wei Zhang 012; Ray C. C. Cheung; Yun Liang 001; Hiroki Nakahara (FPT, 2022)

Melting Glacier: A 37-Year (1984-2020) High-Resolution Glacier-Cover Record of MT. Kilimanjaro. - Shuai Yuan 005; Juepeng Zheng; Lixian Zhang; Runmin Dong; Yile Xing; Yuhan She; Haohuan Fu; Ray C. C. Cheung (IGARSS, 2022)

A Versatility-Performance Balanced Hardware Architecture for Scene Text Detection. - Yao Xin; Guoming Tang; Donglong Chen; Rumin Zhang; Teng Liang; Ray C. C. Cheung; Çetin Kaya Koç (SmartWorld/UIC/ScalCom/DigitalTwin/PriComp/Meta, 2022)

Comp-TCAM: An Adaptable Composite Ternary Content-Addressable Memory on FPGAs. - Muhammad Irfan 004; Hasan Erdem Yantir; Zahid Ullah 001; Ray C. C. Cheung (IEEE Embed. Syst. Lett., 2022)

Reconfigurable content-addressable memory (CAM) on FPGAs: A tutorial and survey. - Muhammad Irfan 004; Abdurrashid Ibrahim Sanka; Zahid Ullah 001; Ray C. C. Cheung (Future Gener. Comput. Syst., 2022)

Machine Learning Based Hardware Architecture for DOA Measurement From Mice EEG. - Mehdi Hasan Chowdhury; Abdelrahman B. M. Eldaly; Stephen Kugbere Agadagba; Ray C. C. Cheung; Leanne Lai-Hang Chan (IEEE Trans. Biomed. Eng., 2022)

High Throughput Hardware/Software Heterogeneous System for RRPN-Based Scene Text Detection. - Yao Xin; Donald Donglong Chen; Chongyang Zeng; Weichen Zhang; Yi Wang 004; Ray C. C. Cheung (IEEE Trans. Computers, 2022)

PipeNTT: A Pipelined Number Theoretic Transform Architecture. - Zewen Ye; Ray C. C. Cheung; Kejie Huang (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

Improved Plantard Arithmetic for Lattice-based Cryptography. - Junhao Huang 001; Jipeng Zhang; Haosong Zhao; Zhe Liu 001; Ray C. C. Cheung; Çetin Kaya Koç; Donglong Chen (IACR Trans. Cryptogr. Hardw. Embed. Syst., 2022)

In-Network Aggregation with Transport Transparency for Distributed Training. - Shuo Liu 002; Qiaoling Wang; Junyi Zhang 005; Wenfei Wu; Qinliang Lin; Yao Liu 006; Meng Xu; Marco Canini; Ray C. C. Cheung; Jianfei He (ASPLOS (3), 2023)

Bidirectionally Deformable Motion Modulation For Video-based Human Pose Transfer. - Wing Yin Yu; Lai-Man Po; Ray C. C. Cheung; Yuzhi Zhao; Yu Xue; Kun Li 015 (ICCV, 2023)

A Platform for Adaptive Interference Mitigation and Intent Analysis Using OpenLANE. - Jinfa Hong; Hei Wong; Oliver C. S. Choy; Ray C. C. Cheung (ICSPCC, 2023)

Homomorphic Encryption-Based System Design for Secure Data Processing. - Yihao Liu; Patrick Hung; Ehsan Nekouei; Ray C. C. Cheung (ICSPCC, 2023)

Image Super-Resolution and FPGA Hardware Design. - Wenqin Luo; Patrick Hung; Shiqi Wang 001; Ray C. C. Cheung (ICSPCC, 2023)

CO-Detector: Towards Complex Object Detection with Cross-Part Feature Learning in Remote Sensing. - Shuai Yuan 005; Juepeng Zheng; Yanlong Huang; Jierui Liu; Haohuan Fu; Ray C. C. Cheung (IGARSS, 2023)

Algorithm-Hardware Co-Design of Split-Radix Discrete Galois Transformation for KyberKEM. - Guangyan Li; Donglong Chen; Gaoyu Mao; Wangchen Dai; Abdurrashid Ibrahim Sanka; Ray C. C. Cheung (IEEE Trans. Emerg. Top. Comput., 2023)

MUREN: MUltistage Recursive Enhanced Network for Coal-Fired Power Plant Detection. - Shuai Yuan 005; Juepeng Zheng; Lixian Zhang; Runmin Dong; Ray C. C. Cheung; Haohuan Fu (Remote. Sens., 2023)

Design of a Hippocampal Cognitive Prosthesis Chip. - Ming Ni; Yan Han; Ray C. C. Cheung; Xuemeng Zhou (IEICE Trans. Electron., 2023)

Efficient and Automatic Breast Cancer Early Diagnosis System Based on the Hierarchical Extreme Learning Machine. - Songyang Lyu; Ray C. C. Cheung (Sensors, 2023)

High-performance and Configurable SW/HW Co-design of Post-quantum Signature CRYSTALS-Dilithium. - Gaoyu Mao; Donglong Chen; Guangyan Li; Wangchen Dai; Abdurrashid Ibrahim Sanka; Çetin Kaya Koç; Ray C. C. Cheung (ACM Trans. Reconfigurable Technol. Syst., 2023)

Efficient Multiple Channels EEG Signal Classification Based on Hierarchical Extreme Learning Machine. - Songyang Lyu; Ray C. C. Cheung (Sensors, 2023)

MSCA: A Multi-Grained Sparse Convolution Accelerator for DNN Training. - Yingchang Mao; Qiang Liu 011; Ray C. C. Cheung (ASAP, 2024)

RO-SVD: A Reconfigurable Hardware Copyright Protection Framework for AIGC Applications. - Zhuoheng Ran; Muhammad A. A. Abdelgawad; Zekai Zhang; Ray C. C. Cheung; Hong Yan 001 (ASAP, 2024)

Design of Light-Weight Encryption Algorithm Based on RISC-V Platform: (PhD Forum Paper). - Zekai Zhang; Ray Chak-Chung Cheung (ASAP, 2024)

Building a Learner-Centric Citywide Digital Literacy Ecosystem: Train-the-Trainer, Community-Based Learning, and Gifted Education - A Guide for Educators, Policymakers, and Stakeholders. - Abdurrashid Ibrahim Sanka; John Wong; Clarice Liu; Patrick Hung; Ray C. C. Cheung (ICBL, 2024)

Enhanced Black-Scholes Option Pricing: Bit-Width Optimization with Automatic Differentiation and Lagrange Multipliers. - Sylvia Siyi Xiang; Ray C. C. Cheung (TENCON, 2024)

A LoRaWAN-BLE Based AIoT Smart Farm Management and Control System. - Fred F. Z. Cai; Ash J. S. Shi; Jeff R. S. Zou; Chaoqiang Jiang; Ray C. C. Cheung; Alan H. F. Lam (WF-IoT, 2024)

Gradient-Congruity Guided Federated Sparse Training. - Chris Xing Tian; Yibing Liu; Haoliang Li; Ray C. C. Cheung; Shiqi Wang 001 (CoRR, 2024)

Efficient Key-Switching for Word-Type FHE and GPU Acceleration. - Shutong Jin; Zhen Gu; Guangyan Li; Donglong Chen; Çetin Kaya Koç; Ray C. C. Cheung; Wangchen Dai (IACR Cryptol. ePrint Arch., 2024)

HTCNN: High-Throughput Batch CNN Inference with Homomorphic Encryption for Edge Computing. - Zewen Ye; Tianshun Huang; Tianyu Wang; Yonggen Li; Chengxuan Wang; Ray C. C. Cheung; Kejie Huang (IACR Cryptol. ePrint Arch., 2024)

Revisiting Keccak and Dilithium Implementations on ARMv7-M. - Junhao Huang 001; Alexandre Adomnicai; Jipeng Zhang; Wangchen Dai; Yao Liu 006; Ray C. C. Cheung; Çetin Kaya Koç; Donglong Chen (IACR Trans. Cryptogr. Hardw. Embed. Syst., 2024)

A Highly-efficient Lattice-based Post-Quantum Cryptography Processor for IoT Applications. - Zewen Ye; Ruibing Song; Hao Zhang; Donglong Chen; Ray Chak-Chung Cheung; Kejie Huang (IACR Trans. Cryptogr. Hardw. Embed. Syst., 2024)

Yet Another Improvement of Plantard Arithmetic for Faster Kyber on Low-End 32-bit IoT Devices. - Junhao Huang 001; Haosong Zhao; Jipeng Zhang; Wangchen Dai; Lu Zhou 002; Ray C. C. Cheung; Çetin Kaya Koç; Donglong Chen (IEEE Trans. Inf. Forensics Secur., 2024)

REALISE-IoT: RISC-V-Based Efficient and Lightweight Public-Key System for IoT Applications. - Gaoyu Mao; Yao Liu 006; Wangchen Dai; Guangyan Li; Zhewen Zhang; Alan H. F. Lam; Ray C. C. Cheung (IEEE Internet Things J., 2024)

Efficient Blind Hyperspectral Unmixing Framework Based on CUR Decomposition (CUR-HU). - Muhammad A. A. Abdelgawad; Ray C. C. Cheung; Hong Yan 001 (Remote. Sens., 2024)

An Efficient FPGA-based Depthwise Separable Convolutional Neural Network Accelerator with Hardware Pruning. - Zhengyan Liu; Qiang Liu 011; Shun Yan; Ray C. C. Cheung (ACM Trans. Reconfigurable Technol. Syst., 2024)

An AIoT LoRaWAN Control System With Compression and Image Recovery Algorithm (CIRA) for Extreme Weather. - Fred F. Z. Cai; Chaoqiang Jiang; Ray C. C. Cheung; Alan H. F. Lam (IEEE Internet Things J., 2024)

EOG Signal Processor: An SVM-based Multiclass Classifier to Detect Eye Movements. - Diba Das; Mehdi Hasan Chowdhury; Aditta Chowdhury; Quazi Delwar Hossain; Ray C. C. Cheung (J. Signal Process. Syst., 2024)

ProgramGalois: A Programmable Generator of Radix-4 Discrete Galois Transformation Architecture for Lattice-Based Cryptography. - Guangyan Li; Zewen Ye; Donglong Chen; Wangchen Dai; Gaoyu Mao; Kejie Huang; Ray C. C. Cheung (ACM Trans. Reconfigurable Technol. Syst., 2024)

FastViT: Real-Time Linear Attention Accelerator for Dense Predictions of Vision Transformer (ViT). - Zhuoheng Ran; Zewen Ye; Chong Wu; Ray C. C. Cheung; Hong Yan 001 (ISCAS, 2025)

CuFDFB: Fast and Private Computation on Non-Linear Functions Using FHE. - Shutong Jin; Shiyu Shen 001; Hao Yang; Donglong Chen; Wangchen Dai; Ray C. C. Cheung (IACR Cryptol. ePrint Arch., 2025)

Efficient CUR decomposition for interpretable low-rank approximations and imaging applications. - Muhammad A. A. Abdelgawad; Ray C. C. Cheung; Hong Yan 001 (Neurocomputing, 2025)

VeloFHE: GPU Acceleration for FHEW and TFHE Bootstrapping. - Shiyu Shen 001; Hao Yang; Zhe Liu 001; Ying Liu; Xianhui Lu; Wangchen Dai; Lu Zhou 002; Yunlei Zhao; Ray C. C. Cheung (IACR Trans. Cryptogr. Hardw. Embed. Syst., 2025)

Randomized tensor decomposition using parallel reconfigurable systems. - Ajita Misra; Muhammad A. A. Abdelgawad; Peng Jing; Ray C. C. Cheung; Hong Yan 001 (J. Supercomput., 2025)

MLFormer: a high performance MPC linear inference framework for transformers. - Siqi Liu; Zhusen Liu; Donglong Chen; Wangchen Dai; Lu Zhou 002; Zhe Liu 001; Ray C. C. Cheung; Çetin Kaya Koç (J. Cryptogr. Eng., 2025)

PQNTRU: Acceleration of NTRU-Based Schemes via Customized Post-Quantum Processor. - Zewen Ye; Junhao Huang 001; Tianshun Huang; Yudan Bai; Jinze Li; Hao Zhang; Guangyan Li; Donglong Chen; Ray C. C. Cheung; Kejie Huang (IEEE Trans. Computers, 2025)

A Speculative Loop Pipeline Framework with Accurate Path Modeling for High-Level Synthesis. - Yuhan She; Jierui Liu; Yanlong Huang; Ray C. C. Cheung; Hong Yan 001 (ACM Trans. Reconfigurable Technol. Syst., 2025)

RVSLH: Acceleration of Postquantum Standard SLH-DSA With Customized RISC-V Processor. - Zewen Ye; Xin Li; Chuhui Wang; Ray C. C. Cheung; Kejie Huang (IEEE Trans. Very Large Scale Integr. Syst., 2025)