Overview of gate linewidth control in the manufacture of CMOS logic chips. - Donald G. Chesebro; James W. Adkisson; Lyman R. Clark; Steven N. Eslinger; Margaret A. Faucher; Steven J. Holmes; Raymond P. Mallette; Edward J. Nowak; Edward W. Sengle; Steven H. Voldman; Thomas W. Weeks (IBM J. Res. Dev., 1995)

Key measurements of ultrathin gate dielectric reliability and in-line monitoring. - W. W. (Bill) Abadeer; Asmik Bagramian; David W. Conkle; Charles W. Griffin; Eric D. Langlois 001; Brian F. Lloyd; Raymond P. Mallette; James E. Massucco; Jonathan M. McKenna; Steven W. Mittl; Philip H. Noel (IBM J. Res. Dev., 1999)