B 74-32 Digital Design. - Raymond P. Voith (IEEE Trans. Computers, 1974)

ULM Implicants for Minimization of Universal Logic Module Circuits. - Raymond P. Voith (IEEE Trans. Computers, 1977)

Minimum Universal Logic Module Sequential Circuits with Decoders. - Raymond P. Voith (IEEE Trans. Computers, 1977)

Optimizations for Behavioral/RTL Simulation. - Sankaran Karthik; Jacob A. Abraham; Raymond P. Voith (VLSI Design, 1993)

The PowerPC 603 C++ Verilog Interface Model. - Raymond P. Voith (COMPCON, 1994)