Modeling symmetrical independent gate FinFET using predictive technology model. - Mohammad Yousef Zarei; Reza Asadpour; Siamak Mohammadi; Ali Afzali-Kusha; Razi Seyyedi (ACM Great Lakes Symposium on VLSI, 2013)

Protecting SRAM-based FPGAs Against Multiple Bit Upsets Using Erasure Codes. - Parthasarathy M. B. Rao; Mojtaba Ebrahimi; Razi Seyyedi; Mehdi Baradaran Tahoori (DAC, 2014)

Comprehensive analysis of alpha and neutron particle-induced soft errors in an embedded processor at nanoscales. - Mojtaba Ebrahimi; Adrian Evans; Mehdi Baradaran Tahoori; Razi Seyyedi; Enrico Costenaro; Dan Alexandrescu (DATE, 2014)

Event-driven transient error propagation: A scalable and accurate soft error rate estimation approach. - Mojtaba Ebrahimi; Razi Seyyedi; Liang Chen 014; Mehdi Baradaran Tahoori (ASP-DAC, 2015)

Comprehensive Analysis of Sequential and Combinational Soft Errors in an Embedded Processor. - Mojtaba Ebrahimi; Adrian Evans; Mehdi Baradaran Tahoori; Enrico Costenaro; Dan Alexandrescu; Vikas Chandra; Razi Seyyedi (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015)

Low-Cost Multiple Bit Upset Correction in SRAM-Based FPGA Configuration Frames. - Mojtaba Ebrahimi; Parthasarathy Murali B. Rao; Razi Seyyedi; Mehdi Baradaran Tahoori (IEEE Trans. Very Large Scale Integr. Syst., 2016)

Towards virtual prototyping of synchronous real-time systems on noc-based MPSoCs. - Razi Seyyedi; Mohamed Tagelsir Mohammadat; Maher Fakih; Kim Grüttner; Johnny Öberg; Duncan Graham (SIES, 2017)

SAFEPOWER project: Architecture for safe and power-efficient mixed-criticality systems. - Maher Fakih; Alina Lenz; Mikel Azkarate-askasua; Javier Coronel; Alfons Crespo; Simon Davidmann; Juan Carlos Diaz Garcia; Nera González Romero; Kim Grüttner; Sören Schreiner; Razi Seyyedi; Roman Obermaisser; et al. (Microprocess. Microsystems, 2017)

Functional Test Environment for Time-Triggered Control Systems in Complex MPSoCs Using GALI. - Razi Seyyedi; Sören Schreiner; Maher Fakih; Kim Grüttner; Wolfgang Nebel (DSD, 2018)

Towards power management verification of time-triggered systems using virtual platforms. - Sören Schreiner; Razi Seyyedi; Maher Fakih; Kim Grüttner; Wolfgang Nebel (SAMOS, 2018)

Functional test environment for time-triggered control systems in complex MPSoCs. - Razi Seyyedi; Sören Schreiner; Maher Fakih; Kim Grüttner; Wolfgang Nebel (Microprocess. Microsystems, 2020)

Globally Accurate Locally Inaccurate (GALI): On the Combination of Time-Triggered Architectures with Instruction Accurate Simulators for the Analysis of System Behavior. - Razi Seyyedi (2023)