IP-XACT extensions for Reconfigurable Computing. - Razvan Nane; Sven van Haastregt; Todor P. Stefanov; Bart Kienhuis; Vlad Mihai Sima; Koen Bertels (ASAP, 2011)

DWARV 2.0: A CoSy-based C-to-VHDL hardware compiler. - Razvan Nane; Vlad Mihai Sima; Bryan Olivier; Roel Meeuws; Yana Yankova; Koen Bertels (FPL, 2012)

Area constraint propagation in high level synthesis. - Razvan Nane; Vlad Mihai Sima; Koen Bertels (FPT, 2012)

A lightweight speculative and predicative scheme for hardware execution. - Razvan Nane; Vlad Mihai Sima; Koen Bertels (ReConFig, 2012)

Deriving Resource Efficient Designs Using the REFLECT Aspect-Oriented Approach - (Extended Abstract). - José Gabriel F. Coutinho; João M. P. Cardoso; Tiago Carvalho 001; Ricardo Nobre; Sujit Bhattacharya 002; Pedro C. Diniz; Liam Fitzpatrick; Razvan Nane (ARC, 2013)

Controlling a complete hardware synthesis toolchain with LARA aspects. - João M. P. Cardoso; Tiago Carvalho 001; José Gabriel F. Coutinho; Ricardo Nobre; Razvan Nane; Pedro C. Diniz; Zlatko Petrov; Wayne Luk; Koen Bertels (Microprocess. Microsystems, 2013)

Quipu: A Statistical Model for Predicting Hardware Resources. - Roel Meeuws; Sayyed Arash Ostadzadeh; Carlo Galuzzi; Vlad Mihai Sima; Razvan Nane; Koen Bertels (ACM Trans. Reconfigurable Technol. Syst., 2013)

High-Level Synthesis in the Delft Workbench Hardware/Software Co-design Tool-Chain. - Razvan Nane; Vlad Mihai Sima; Cuong Pham-Quoc; Fernando M. Gonçalves; Koen Bertels (EUC, 2014)

Automatic Hardware Generation for Reconfigurable Architectures. - Razvan Nane (2014)

Low-Cost Software Control-Flow Error Recovery. - Ghazaleh Nazarian; Razvan Nane; Georgi Gaydadjiev (DSD, 2015)

Computation-in-memory based parallel adder. - Hoang Anh Du Nguyen; Lei Xie 005; Mottaqiallah Taouil; Razvan Nane; Said Hamdioui; Koen Bertels (NANOARCH, 2015)

Parallel matrix multiplication on memristor-based computation-in-memory architecture. - Adib Haron; Jintao Yu; Razvan Nane; Mottaqiallah Taouil; Said Hamdioui; Koen Bertels (HPCS, 2016)

Skeleton-based design and simulation flow for Computation-in-Memory architectures. - Jintao Yu; Razvan Nane; Adib Haron; Said Hamdioui; Henk Corporaal; Koen Bertels (NANOARCH, 2016)

An Image Processing VLIW Architecture for Real-Time Depth Detection. - Dan Iorga; Razvan Nane; Yi Lu 004; Edwin van Dalen; Koen Bertels (SBAC-PAD, 2016)

A Survey and Evaluation of FPGA High-Level Synthesis Tools. - Razvan Nane; Vlad Mihai Sima; Christian Pilato; Jongsok Choi; Blair Fort; Andrew Canis; Yu Ting Chen; Hsuan Hsiao; Stephen Brown 003; Fabrizio Ferrandi; Jason Helge Anderson; Koen Bertels (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016)

A Domain-Specific Language and Compiler for Computation-in-Memory Skeletons. - Jintao Yu; Tom Hogervorst; Razvan Nane (ACM Great Lakes Symposium on VLSI, 2017)

On the Implementation of Computation-in-Memory Parallel Adder. - Hoang Anh Du Nguyen; Lei Xie 005; Mottaqiallah Taouil; Razvan Nane; Said Hamdioui; Koen Bertels (IEEE Trans. Very Large Scale Integr. Syst., 2017)

Sparstition: A Partitioning Scheme for Large-Scale Sparse Matrix Vector Multiplication on FPGA. - Björn Sigurbergsson; Tom Hogervorst; Tong Dong Qiu; Razvan Nane (ASAP, 2019)

Skeleton-Based Synthesis Flow for Computation-in-Memory Architectures. - Jintao Yu; Razvan Nane; Imran Ashraf; Mottaqiallah Taouil; Said Hamdioui; Henk Corporaal; Koen Bertels (IEEE Trans. Emerg. Top. Comput., 2020)

Hardware Acceleration of HPC Computational Flow Dynamics using HBM-enabled FPGAs. - Tom Hogervorst; Tong Dong Qiu; Giacomo Marchiori; Alf Birger Rustad; Markus Blatt; Razvan Nane (CoRR, 2021)

SDC-based Resource Constrained Scheduling for Quantum Control Architectures. - Razvan Nane (CoRR, 2022)

OpenQL: A Portable Quantum Programming Framework for Quantum Accelerators. - Nader Khammassi; Imran Ashraf; J. van Someren 001; Razvan Nane; Anna M. Krol; M. A. Rol; Lingling Lao; Koen Bertels; Carmen G. Almudéver (ACM J. Emerg. Technol. Comput. Syst., 2022)

Hardware Acceleration of High-Performance Computational Flow Dynamics Using High-Bandwidth Memory-Enabled Field-Programmable Gate Arrays. - Tom Hogervorst; Razvan Nane; Giacomo Marchiori; Tong Dong Qiu; Markus Blatt; Alf Birger Rustad (ACM Trans. Reconfigurable Technol. Syst., 2022)

An Evaluation and Comparison of GPU Hardware and Solver Libraries for Accelerating the OPM Flow Reservoir Simulator. - Tong Dong Qiu; Andreas Thune; Markus Blatt; Alf Birger Rustad; Razvan Nane (CoRR, 2023)