A parameterized power-aware IP core generator for the 2-D 8×8 DCT/IDCT. - Rei-Chin Ju; Jia-Wei Chen; Jiun-In Guo; Tien-Fu Chen (ISCAS (2), 2004)

An efficient 2-D DCT/IDCT core design using cyclic convolution and adder-based realization. - Jiun-In Guo; Rei-Chin Ju; Jia-Wei Chen (IEEE Trans. Circuits Syst. Video Technol., 2004)