Automatic synthesis and technology mapping of combinational logic. - Reinaldo A. Bergamaschi (ICCAD, 1988)

Synthesis Using Path-Based scheduling: algorithms and Exercises. - Raul Compasano; Reinaldo A. Bergamaschi (DAC, 1990)

Redesign using state splitting. - Raul Camposano; Reinaldo A. Bergamaschi (EURO-DAC, 1990)

Data-Path Synthesis Using Path Analysis. - Reinaldo A. Bergamaschi; Raul Camposano; Michael Payer (DAC, 1991)

Area and performance optimizations in path-based scheduling. - Reinaldo A. Bergamaschi; Raul Camposano; Michael Payer (EURO-DAC, 1991)

The Effects of False Paths in High-Level Synthesis. - Reinaldo A. Bergamaschi (ICCAD, 1991)

Scheduling under resource constraints and module assignment. - Reinaldo A. Bergamaschi; Raul Camposano; Michael Payer (Integr., 1991)

SKOL: a system for logic synthesis and technology mapping. - Reinaldo A. Bergamaschi (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991)

Control Optimization in High-Level Synthesis Using Behavioral Don't Cares. - Reinaldo A. Bergamaschi; Donald A. Lobo; Andreas Kuehlmann (DAC, 1992)

Timing analysis in high-level synthesis. - Andreas Kuehlmann; Reinaldo A. Bergamaschi (ICCAD, 1992)

High-Level State Machine Specification and Synthesis. - Andreas Kuehlmann; Reinaldo A. Bergamaschi (ICCD, 1992)

Allocation algorithms based on path analysis. - Reinaldo A. Bergamaschi; Raul Camposano; Michael Payer (Integr., 1992)

A system for production use of high-level synthesis. - Reinaldo A. Bergamaschi; Andreas Kuehlmann (IEEE Trans. Very Large Scale Integr. Syst., 1993)

Productivity Issues in High-Level Design: Are Tools Solving the Real Problems? - Reinaldo A. Bergamaschi (DAC, 1995)

Efficient use of large don't cares in high-level and logic synthesis. - Reinaldo A. Bergamaschi; Daniel Brand; Leon Stok; Michel R. C. M. Berkelaar; Shiv Prakash (ICCAD, 1995)

Be careful with don't cares. - Daniel Brand; Reinaldo A. Bergamaschi; Leon Stok (ICCAD, 1995)

High-level synthesis in an industrial environment. - Reinaldo A. Bergamaschi; Richard A. O'Connor; Leon Stok; Michael Z. Moricz; Shiv Prakash; Andreas Kuehlmann; D. Sreenivasa Rao (IBM J. Res. Dev., 1995)

Observable Time Windows: Verifying the Results of High-Level Synthesis. - Reinaldo A. Bergamaschi; Salil Raje (ED&TC, 1996)

Generalized resource sharing. - Salil Raje; Reinaldo A. Bergamaschi (ICCAD, 1997)

Observable Time Windows: Verifying High-Level Synthesis Results. - Reinaldo A. Bergamaschi; Salil Raje (IEEE Des. Test Comput., 1997)

Control-flow versus data-flow-based scheduling: combining both approaches in an adaptive scheduling system. - Reinaldo A. Bergamaschi; Salil Raje; Indira Nair; Louise Trevillyan (IEEE Trans. Very Large Scale Integr. Syst., 1997)

Don't cares in synthesis: theoretical pitfalls and practical solutions. - Daniel Brand; Reinaldo A. Bergamaschi; Leon Stok (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998)

Behavioral Network Graph: Unifying the Domains of High-Level and Logic Synthesis. - Reinaldo A. Bergamaschi (DAC, 1999)

Embedded Java: techniques and applications (tutorial abstract). - Reinaldo A. Bergamaschi; Brian M. Barry; John Duimovich (ICCAD, 1999)

Synthesis of Arrays and Records. - Pradip K. Jha; Steven Barnfield; John B. Weaver; Rudra Mukherjee; Reinaldo A. Bergamaschi (ICCD, 1999)

Panel Statement: System-Level Design: Designers' Wish List vs. Reality. - Daniel Gajski; Reinaldo A. Bergamaschi (ISSS, 1999)

Coral-automating the design of systems-on-chip using cores. - Reinaldo A. Bergamaschi; William R. Lee; Duane Richardson; Subhrajit Bhattacharya; Michael Muhlada; Ronaldo Wagner; Arthur Weiner; Foster White (CICC, 2000)

Designing systems-on-chip using cores. - Reinaldo A. Bergamaschi; William R. Lee (DAC, 2000)

Automating the Design of SOCs Using Cores. - Reinaldo A. Bergamaschi; Subhrajit Bhattacharya; Ronoldo Wagner; Colleen Fellenz; Michael Muhlada; William R. Lee; Foster White; Jean-Marc Daveau (IEEE Des. Test Comput., 2001)

The A to Z of SoCs. - Reinaldo A. Bergamaschi; John M. Cohn (ICCAD, 2002)

Early analysis tools for system-on-a-chip design. - John A. Darringer; Reinaldo A. Bergamaschi; Subhrajit Bhattacharya; Daniel Brand; Andreas Herkersdorf; Joseph K. Morrell; Indira Nair; Patricia Sagmeister; Youngsoo Shin (IBM J. Res. Dev., 2002)

Bridging the domains of high-level and logic synthesis. - Reinaldo A. Bergamaschi (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002)

Modeling and Integration of Peripheral Devices in Embedded Systems. - Shaojie Wang; Sharad Malik; Reinaldo A. Bergamaschi (Embedded Software for SoC, 2003)

System-level design tools: who needs them, who has them, and how much should they cost? - Reinaldo A. Bergamaschi; Grant Martin (CODES+ISSS, 2003)

The future of system-level design: can we find the right solutions to the right problems at the right time? - Reinaldo A. Bergamaschi; Grant Martin; Wayne H. Wolf; Rolf Ernst; Kees A. Vissers; Jack Kouloheris (CODES+ISSS, 2003)

SEAS: a system for early analysis of SoCs. - Reinaldo A. Bergamaschi; Youngsoo Shin; Nagu R. Dhanwada; Subhrajit Bhattacharya; William E. Dougherty; Indira Nair; John A. Darringer; Sarala Paliwal (CODES+ISSS, 2003)

State-based power analysis for systems-on-chip. - Reinaldo A. Bergamaschi; Yunjian Jiang (DAC, 2003)

Modeling and Integration of Peripheral Devices in Embedded Systems. - Shaojie Wang; Sharad Malik; Reinaldo A. Bergamaschi (DATE, 2003)

Simplifying SoC design with the Customizable Control Processor Platform. - C. Ross Ogilvie; Richard Ray; Robert Devins; Mark Kautzman; Michael Hale; Reinaldo A. Bergamaschi; Bob Lynch; Santosh Gaur (ICCD, 2003)

System level design: six success stories in search of an industry. - Francine Bacchini; Pierre G. Paulin; Reinaldo A. Bergamaschi; Raj Pawate; Arie Bernstein; Ramesh Chandra; Mohamed Ben-Romdhane (DAC, 2004)

Early and accurate analysis of SoCs: oxymoron or real? - Reinaldo A. Bergamaschi (SLIP, 2004)

Is there a Market for SystemC Tools? - Wolfgang Rosenstiel; Reinaldo A. Bergamaschi; Frank Ghenassia; Thorsten Groetker; Masamichi Kawarabayashi; Marinus C. van Lier; Albrecht Mayer; Mike Meredith; Mark Milligan; Stuart Swan (DATE, 2005)

Editors' introduction. - Reinaldo A. Bergamaschi; Wolfgang Rosenstiel (Des. Autom. Embed. Syst., 2005)

Second special issue on SystemC. - Reinaldo A. Bergamaschi; Wolfgang Rosenstiel (Des. Autom. Embed. Syst., 2005)

Transaction-level modeling for architectural and power analysis of PowerPC and CoreConnect-based systems. - Nagu R. Dhanwada; Reinaldo A. Bergamaschi; William W. Dungan; Indira Nair; Paul Gramann; William E. Dougherty; Ing-Chao Lin (Des. Autom. Embed. Syst., 2005)

Blue Gene/L compute chip: Memory and Ethernet subsystem. - Martin Ohmacht; Reinaldo A. Bergamaschi; Subhrajit Bhattacharya; Alan Gara; Mark Giampapa; Balaji Gopalsamy; Ruud A. Haring; Dirk Hoenicke; David J. Krolak; James A. Marcella; Ben J. Nathanson; Valentina Salapura; et al. (IBM J. Res. Dev., 2005)

Heterogeneous behavioral hierarchy for system level designs. - Hiren D. Patel; Sandeep K. Shukla; Reinaldo A. Bergamaschi (DATE, 2006)

Performance modeling for early analysis of multi-core systems. - Reinaldo A. Bergamaschi; Indira Nair; Gero Dittmann; Hiren D. Patel; Geert Janssen; Nagu R. Dhanwada; Alper Buyuktosunoglu; Emrah Acar; Gi-Joon Nam; Dorothy Kucar; Pradip Bose; John A. Darringer; et al. (CODES+ISSS, 2007)

Embedded Systems Week. - Reinaldo A. Bergamaschi (IEEE Des. Test Comput., 2007)

Heterogeneous Behavioral Hierarchy Extensions for SystemC. - Hiren D. Patel; Sandeep K. Shukla; Reinaldo A. Bergamaschi (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007)

Exploring power management in multi-core systems. - Reinaldo A. Bergamaschi; Guoling Han; Alper Buyuktosunoglu; Hiren D. Patel; Indira Nair; Gero Dittmann; Geert Janssen; Nagu R. Dhanwada; Zhigang Hu; Pradip Bose; John A. Darringer (ASP-DAC, 2008)

Challenges of the nanoscale era. - Ricardo P. Jacobi; Reinaldo A. Bergamaschi (SBCCI, 2008)

The State of ESL Design [Roundtable]. - Reinaldo A. Bergamaschi; Luca Benini; Krisztián Flautner; Wido Kruijtzer; Alberto L. Sangiovanni-Vincentelli; Kazutoshi Wakabayashi (IEEE Des. Test Comput., 2008)

ESWEEK 2007 special issue introduction. - Reinaldo A. Bergamaschi; Wolfgang Rosenstiel (Des. Autom. Embed. Syst., 2009)

ESWEEK 2009 special issue introduction. - Reinaldo A. Bergamaschi (Des. Autom. Embed. Syst., 2010)

Empirical Web server power modeling and characterization. - Leonardo Piga; Reinaldo A. Bergamaschi; Felipe Klein; Rodolfo Azevedo; Sandro Rigo (IISWC, 2011)

Announcement: introducing Odysci. - Reinaldo A. Bergamaschi (ACM SIGACCESS Access. Comput., 2011)

A quantitative analysis of WWW, hypertext and JCDL conferences in the last decade. - Reinaldo A. Bergamaschi; Rodrigo Carvalho Rezende; Henrique Przibisczki de Oliveira; Akihito Kumon Jr. (SIGWEB Newsl., 2012)

Data center power and performance optimization through global selection of P-states and utilization rates. - Reinaldo A. Bergamaschi; Leonardo Piga; Sandro Rigo; Rodolfo Azevedo; Guido Araújo (Sustain. Comput. Informatics Syst., 2012)

Introductions to special issue on ESWEEK 2011. - Reinaldo A. Bergamaschi; Sanjoy K. Baruah; Sebastian Fischmeister; Robert P. Dick; Jan Madsen; Rajesh Gupta 001; Vincent John Mooney III (Des. Autom. Embed. Syst., 2013)

Empirical and analytical approaches for web server power modeling. - Leonardo Piga; Reinaldo A. Bergamaschi; Sandro Rigo (Clust. Comput., 2014)

The Odysci Academic Search System. - Reinaldo A. Bergamaschi; Henrique Przibisczki de Oliveira; Akihito Kumon Jr.; Rodrigo Carvalho Rezende (D Lib Mag., 2014)

Adaptive global power optimization for Web servers. - Leonardo Piga; Reinaldo A. Bergamaschi; Maurício Breternitz; Sandro Rigo (J. Supercomput., 2014)