Analyzing Area and Performance Penalty of Protecting Different Digital Modules with Hamming Code and Triple Modular Redundancy. - Renato Fernandes Hentschke; Felipe S. Marques 001; Fernanda Lima 001; Luigi Carro; Altamiro Amadeu Susin; Ricardo Reis 001 (SBCCI, 2002)

Plic-Plac: a novel constructive algorithm for placement. - Renato Fernandes Hentschke; Ricardo Reis 001 (ISCAS (5), 2003)

Improving Simulated Annealing Placement by Applying Random and Greedy Mixed Perturbations. - Renato Fernandes Hentschke; Ricardo Augusto da Luz Reis (SBCCI, 2003)

A study on the performance of fast initial placement algorithms. - Renato Fernandes Hentschke; Marcelo de Oliveira Johann; Ricardo Augusto da Luz Reis (VLSI-SOC, 2003)

Design Space Exploration with Automatic Generation of IP-Based Embedded Software. - Júlio C. B. de Mattos; Lisane B. de Brisolara; Renato Fernandes Hentschke; Luigi Carro; Flávio Rech Wagner (DIPES, 2004)

Designing Fault-Tolerant Techniques for SRAM-Based FPGAs. - Fernanda Lima Kastensmidt; Gustavo Neuberger; Renato Fernandes Hentschke; Luigi Carro; Ricardo Reis 001 (IEEE Des. Test Comput., 2004)

Blue Macaw: A Didactic Placement Tool Using Simulated Annealing. - Renato Fernandes Hentschke; Marcelo O. Johann; Ricardo Reis 001 (EDUTECH, 2005)

Improving run times by pruned application of synthesis transforms. - Renato Fernandes Hentschke; Jagannathan Narasimhan; David S. Kung 001 (SBCCI, 2005)

Unbalacing the I/O Pins Partitioning for Minimizing Inter-Tier Vias in 3D VLSI Circuits. - Sandro Sawicki; Renato Fernandes Hentschke; Marcelo O. Johann; Ricardo Reis 001 (ICECS, 2006)

Quadratic placement for 3d circuits using z-cell shifting, 3d iterative refinement and simulated annealing. - Renato Fernandes Hentschke; Guilherme Flach; Felipe Pinto; Ricardo Reis 001 (SBCCI, 2006)

An Algorithm for I/O Partitioning Targeting 3D Circuits and Its Impact on 3D-Vias. - Renato Fernandes Hentschke; Sandro Sawicki; Marcelo O. Johann; Ricardo Augusto da Luz Reis (VLSI-SoC, 2006)

A Method for I/O Pins Partitioning Targeting 3D VLSI Circuits. - Renato Fernandes Hentschke; Sandro Sawicki; Marcelo O. Johann; Ricardo Reis 001 (VLSI-SoC (Selected Papers), 2006)

A 3D-Via Legalization Algorithm for 3D VLSI Circuits and its Impact on Wire Length. - Renato Fernandes Hentschke; Ricardo Reis 001 (ISCAS, 2007)

Maze routing steiner trees with effective critical sink optimization. - Renato Fernandes Hentschke; Jaganathan Narasimham; Marcelo O. Johann; Ricardo Augusto da Luz Reis (ISPD, 2007)

3D-Vias Aware Quadratic Placement for 3D VLSI Circuits. - Renato Fernandes Hentschke; Guilherme Flach; Felipe Pinto; Ricardo Reis 001 (ISVLSI, 2007)

Cell placement on graphics processing units. - Guilherme Flach; Marcelo O. Johann; Renato Fernandes Hentschke; Ricardo Reis 001 (SBCCI, 2007)

Algorithms for wire length improvement of VLSI circuits with concern to critical paths - Renato Fernandes Hentschke (2007)

Exact route matching algorithms for analog and mixed signal integrated circuits. - Muhammet Mustafa Ozdal; Renato Fernandes Hentschke (ICCAD, 2009)

Maze Routing Steiner Trees With Delay Versus Wire Length Tradeoff. - Renato Fernandes Hentschke; Jagannathan Narasimhan; Marcelo O. Johann; Ricardo Reis 001 (IEEE Trans. Very Large Scale Integr. Syst., 2009)

An Algorithmic Study of Exact Route Matching for Integrated Circuits. - Muhammet Mustafa Ozdal; Renato Fernandes Hentschke (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011)

Maze routing algorithms with exact matching constraints for analog and mixed signal designs. - Muhammet Mustafa Ozdal; Renato Fernandes Hentschke (ICCAD, 2012)

Posicionamento de Circuitos 3D Considerando o Planejamento de 3D-Vias. - Renato Fernandes Hentschke; Marcelo O. Johann; Ricardo Reis 001 (RITA, 2012)

Algorithms for Maze Routing With Exact Matching Constraints. - Muhammet Mustafa Ozdal; Renato Fernandes Hentschke (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014)

Declarative Language for Geometric Pattern Matching in VLSI Process Rule Modeling. - Gyuszi Suto; Geoff S. Greenleaf; Phanindra Bhagavatula; Heinrich R. Fischer; Sanjay K. Soni; Brian H. Miller; Renato Fernandes Hentschke (ISPD, 2019)