Parichute: Generalized Turbocode-Based Error Correction for Near-Threshold Caches. - Timothy N. Miller; Renji Thomas; James Dinan; Bruce M. Adcock; Radu Teodorescu (MICRO, 2010)

StVEC: A Vector Instruction Extension for High Performance Stencil Computation. - Naser Sedaghati; Renji Thomas; Louis-Noël Pouchet; Radu Teodorescu; P. Sadayappan (PACT, 2011)

Booster: Reactive core acceleration for mitigating the effects of process variation and application imbalance in low-voltage chips. - Timothy N. Miller; Xiang Pan; Renji Thomas; Naser Sedaghati; Radu Teodorescu (HPCA, 2012)

VRSync: Characterizing and eliminating synchronization-induced voltage emergencies in many-core processors. - Timothy N. Miller; Renji Thomas; Xiang Pan; Radu Teodorescu (ISCA, 2012)

Mitigating the Effects of Process Variation in Ultra-low Voltage Chip Multiprocessors using Dual Supply Voltages and Half-Speed Units. - Timothy N. Miller; Renji Thomas; Radu Teodorescu (IEEE Comput. Archit. Lett., 2012)

Core tunneling: Variation-aware voltage noise mitigation in GPUs. - Renji Thomas; Kristin Barber; Naser Sedaghati; Li Zhou 012; Radu Teodorescu (HPCA, 2016)

EmerGPU: Understanding and mitigating resonance-induced voltage noise in GPU architectures. - Renji Thomas; Naser Sedaghati; Radu Teodorescu (ISPASS, 2016)

Snatch: Opportunistically reassigning power allocation between processor and memory in 3D stacks. - Dimitrios Skarlatos 002; Renji Thomas; Aditya Agrawal; Shibin Qin; Robert C. N. Pilawa-Podgurski; Ulya R. Karpuzcu; Radu Teodorescu; Nam Sung Kim; Josep Torrellas (MICRO, 2016)