An Area-Efficient Out-of-Order Soft-Core Processor Without Register Renaming. - Junichiro Kadomoto; Toru Koizumi 001; Akifumi Fukuda; Reoma Matsuo; Susumu Mashimo; Akifumi Fujita; Ryota Shioya; Hidetsugu Irie; Shuichi Sakai (FPT, 2018)

An Open Source FPGA-Optimized Out-of-Order RISC-V Soft Processor. - Susumu Mashimo; Koji Inoue; Ryota Shioya; Akifumi Fujita; Reoma Matsuo; Seiya Akaki; Akifumi Fukuda; Toru Koizumi 001; Junichiro Kadomoto; Hidetsugu Irie; Masahiro Goshima (FPT, 2019)

Improving the Instruction Fetch Throughput with Dynamically Configuring the Fetch Pipeline. - Reoma Matsuo; Ryota Shioya; Hideki Ando (IEEE Comput. Archit. Lett., 2019)

SurgeFuzz: Surge-Aware Directed Fuzzing for CPU Designs. - Yuichi Sugiyama; Reoma Matsuo; Ryota Shioya (ICCAD, 2023)

Branch Divergence-Aware Flexible Approximating Technique on GPUs. - Reoma Matsuo; Yuya Degawa; Hidetsugu Irie; Shuichi Sakai; Ryota Shioya (COOL CHIPS, 2024)

TURBULENCE: Complexity-Effective Out-of-Order Execution on GPU With Distance-Based ISA. - Reoma Matsuo; Toru Koizumi 001; Hidetsugu Irie; Shuichi Sakai; Ryota Shioya (IEEE Comput. Archit. Lett., 2024)

Enhancing GPU Performance Through Complexity-Effective Out-of-Order Execution Using Distance-Based ISA. - Reoma Matsuo; Toru Koizumi 001; Hidetsugu Irie; Shuichi Sakai; Ryota Shioya (IEICE Trans. Inf. Syst., 2025)

Flexible Approximate Computing for Mitigating Branch Divergence in GPUs. - Reoma Matsuo; Yuya Degawa; Hidetsugu Irie; Shuichi Sakai; Ryota Shioya (IEEE Micro, 2025)