VINCI: Secure Test of a VLSI High-Speed Encryption System. - Heinz Bonnenberg; Andreas Curiger; Norbert Felber; Hubert Kaeslin; Reto Zimmermann; Wolfgang Fichtner (ITC, 1993)

A 177 Mb/s VLSI implementation of the International Data Encryption Algorithm. - Reto Zimmermann; Andreas Curiger; Heinz Bonnenberg; Hubert Kaeslin; Norbert Felber; Wolfgang Fichtner (IEEE J. Solid State Circuits, 1994)

Hardware implementation of a systolic antenna array signal processor based on CORDIC arithmetic. - Bruno Haller; Matthias Streiff; Urs Fleisch; Reto Zimmermann (ICASSP, 1997)

Low-power logic styles: CMOS versus pass-transistor logic. - Reto Zimmermann; Wolfgang Fichtner (IEEE J. Solid State Circuits, 1997)

Efficient VLSI Implementation of Modulo (2^n=B11) Addition and Multiplication. - Reto Zimmermann (IEEE Symposium on Computer Arithmetic, 1999)

Datapath Synthesis for Standard-Cell Design. - Reto Zimmermann (IEEE Symposium on Computer Arithmetic, 2009)