Processor-based built-in self-test for embedded DRAM. - Jeffrey H. Dreibelbis; John Barth 001; Howard L. Kalter; Rex Kho (IEEE J. Solid State Circuits, 1998)

BIST-Based Bitfail Mapping of an Embedded DRAM. - Brian R. Kessler; Jeffrey H. Dreibelbis; Tim McMahon; Joshua S. McCloy; Rex Kho (MTDT, 2001)

75nm 7Gb/s/pin 1Gb GDDR5 graphics memory device with bandwidth-improvement techniques. - Rex Kho; David Boursin; Martin Brox; Peter Gregorius; Heinz Hoenigschmid; Bianka Kho; Sabine Kieser; Daniel Kehrer; Maksim Kuzmenka; Udo Moeller; Pavel Veselinov Petkov; Manfred Plan; et al. (ISSCC, 2009)

A 75 nm 7 Gb/s/pin 1 Gb GDDR5 Graphics Memory Device With Bandwidth Improvement Techniques. - Rex Kho; David Boursin; Martin Brox; Peter Gregorius; Heinz Hoenigschmid; Bianka Kho; Sabine Kieser; Daniel Kehrer; Maksim Kuzmenka; Udo Moeller; Pavel Veselinov Petkov; Manfred Plan; et al. (IEEE J. Solid State Circuits, 2010)

Integrated System-on-Module for Design-Space Exploration of Spiking Neural Networks. - Moamen El-Masry; Taher Kourany; Rex Kho; Thilo Werner; Amir Zjajo; Robert Weigel (AICAS, 2023)