Parallel Addition Using Pipeline Structure. - Reza Hashemian (ICPP (1), 1990)

Square Rooting Algorithms for Integer and Floatingg-Point Numbers. - Reza Hashemian (IEEE Trans. Computers, 1990)

An alternative algorithm for high speed multiplication and addition using growing technique. - Reza Hashemian (Great Lakes Symposium on VLSI, 1992)

High speed search and memory efficient Huffman coding. - Reza Hashemian (ISCAS, 1993)

Design of a 54-bit adder using a modified Manchester carry chain. - Reza Hashemian (Great Lakes Symposium on VLSI, 1994)

Memory efficient and high-speed search Huffman coding. - Reza Hashemian (IEEE Trans. Commun., 1995)

Direct Huffman Coding And Decoding Using The Table Of Code-Lengths. - Reza Hashemian (ITCC, 2003)

A Hybrid Number System And Its Application In FPGA-DSP Technology. - Reza Hashemian; Bipin Sreedharan (ITCC (2), 2004)

Condensed table of Huffman coding, a new approach to efficient decoding. - Reza Hashemian (IEEE Trans. Commun., 2004)

Designing Analog Circuits with Reduced Biasing Power. - Reza Hashemian (ICECS, 2006)

FPGA e-Lab, a Technique to Remote Access a Laboratory to Design and Test. - Reza Hashemian; Jason Riddley (MSE, 2007)

Use of local biasing in designing analog integrated circuits. - Reza Hashemian (EIT, 2008)

Local Biasing and the Use of Nullator-Norator Pairs in Analog Circuits Designs. - Reza Hashemian (VLSI Design, 2010)

Application of Fixator-Norator Pairs in Designing Active Loads and Current Mirrors in Analog Integrated Circuits. - Reza Hashemian (IEEE Trans. Very Large Scale Integr. Syst., 2012)

vLab, a high speed multi-accesses parallel processing remote laboratory access for FPGA design technology. - Kamran Ravanasa; Reza Hashemian (EIT, 2014)

Fixator-Norator Pairs Versus Direct Analytical Tools in Performing Analog Circuit Designs. - Reza Hashemian (IEEE Trans. Circuits Syst. II Express Briefs, 2014)

Extraction of Poles and Zeros of an RC Circuit With Roots on the Real Axis. - Reza Hashemian (IEEE Trans. Circuits Syst. II Express Briefs, 2014)

Identification and extraction of all real axis poles and zeros in RC and RL circuits. - Reza Hashemian (EIT, 2015)

S-plane bode plots - identifying poles and zeros in a circuit transfer function. - Reza Hashemian (LASCAS, 2015)

Application of nullors in designing analog circuits for bandwidth. - Reza Hashemian (EIT, 2016)

RC and RL to LC circuit conversion, and its application in poles and zeros identification. - Reza Hashemian (ICECS, 2016)

Finding poles and zeros in an analog circuit directly from its conductance matrix using eigenvalues. - Reza Hashemian (Comput. Electr. Eng., 2016)

Nullors in amplifier design for bandwidth using multiple feedbacks. - Reza Hashemian (CCECE, 2017)

Identifying and 3D Displaying Poles and Zeros in Analog Circuit Transfer Functions: Bode Surfaces. - Reza Hashemian; Mounika Vanga; Mahmoud Rahat (Circuits Syst. Signal Process., 2017)

A Comprehensive Nodal/Branch Circuit Analysis Including Fixator-Norator Pairs in Analog Circuits. - Reza Hashemian (MWSCAS, 2018)

Fixator-Norator Pair Based Design of Feedback Networks for Analog Amplifier Circuits. - Rohith Krishnan Pilla; S. Krishnakumar; Reza Hashemian (J. Circuits Syst. Comput., 2018)

A nullor approach to the design of analog circuits for a desirable performance. - Rohith Krishnan Pilla; S. Krishnakumar; Reza Hashemian (Microelectron. J., 2018)

Amplifier Design for Specified Frequency Response Profiles Using Nullors-Hearing Aids, a Case Study. - Reza Hashemian (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)

Design of Analog Circuits for Continuously Changing Constraints Using Fixator Norator Pairs. - Reza Hashemian (MWSCAS, 2019)

Constructing Circuit Transfer Functions directly from the State Equations, Using Convolutions. - Reza Hashemian (EIT, 2020)

s-Expanded Transfer Function using UaL Decomposition with Convolution & Deconvolution. - Reza Hashemian (ISCAS, 2020)

UaL Decomposition, an Alternative to the LU Factorization of MNA Matrices. - Reza Hashemian (IEEE Trans. Circuits Syst. II Express Briefs, 2020)

Application of Nullors in Symbolic Single Port Transfer Functions Using Admittance Method. - Reza Hashemian (ISCAS, 2021)

A Comprehensive and Unified Procedure for Symbolic Analysis of Analog Circuits. - Reza Hashemian (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

Quick Access to Circuit Transfer Functions via NAM Determinant/Cofactors Using UaL Technique. - Reza Hashemian (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

Extended "A Comprehensive and Unified Procedure for Symbolic Analysis of Analog Circuits". - Reza Hashemian (IEEE Trans. Circuits Syst. II Express Briefs, 2024)