A 10-Bit 0.5 V 100 KS/S SAR ADC with a New rail-to-rail Comparator for Energy Limited Applications. - Reza Inanlou; Mohammad Yavari (J. Circuits Syst. Comput., 2014)

ADC-Assisted Random Sampler Architecture for Efficient Sparse Signal Acquisition. - Mehdi Safarpour; Reza Inanlou; Mostafa Charmi; Omid Shoaei; Olli Silvén (IEEE Trans. Very Large Scale Integr. Syst., 2018)

A Reconfigurable Dual-Mode Tracking SAR ADC without Analog Subtraction. - Mehdi Safarpour; Reza Inanlou; Olli Silvén; Timo Rahkonen; Omid Shoaei (SPA, 2019)

Arithmetic Tracking Adaptive SAR ADC for Signals With Low-Activity Periods. - Reza Inanlou; Mehdi Safarpour; Olli Silvén (IEEE Access, 2020)

An asynchronous pulse width modulator for DC-DC buck converter. - Reza Inanlou; Omid Shoaei; Mohsen Tamaddon (Int. J. Circuit Theory Appl., 2020)

Algorithm Level Error Detection in Low Voltage Systolic Array. - Mehdi Safarpour; Reza Inanlou; Olli Silvén (IEEE Trans. Circuits Syst. II Express Briefs, 2022)