A new hybrid FPGA with nanoscale clusters and CMOS routing. - Reza M. Rad; Mohammad Tehranipoor (DAC, 2006)

A Reconfiguration-based Defect Tolerance Method for Nanoscale Devices. - Reza M. Rad; Mohammad Tehranipoor (DFT, 2006)

Fine-grained island style architecture for molecular electronic devices. - Mohammad Tehranipoor; Reza M. Rad (FPGA, 2006)

Test and recovery for fine-grained nanoscale architectures. - Mohammad Tehranipoor; Reza M. Rad (FPGA, 2006)

SCT: An Approach For Testing and Configuring Nanoscale Devices. - Reza M. Rad; Mohammad Tehranipoor (VTS, 2006)

Evaluating area and performance of hybrid FPGAs with nanoscale clusters and CMOS routing. - Reza M. Rad; Mohammad Tehranipoor (ACM J. Emerg. Technol. Comput. Syst., 2007)

Built-In Self-Test and Recovery Procedures for Molecular Electronics-Based Nanofabrics. - Mohammad Tehranipoor; Reza M. Rad (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007)

Sensitivity Analysis to Hardware Trojans using Power Supply Transient Signals. - Reza M. Rad; Jim Plusquellic; Mohammad Tehranipoor (HOST, 2008)

Power supply signal calibration techniques for improving detection resolution to hardware Trojans. - Reza M. Rad; Xiaoxiao Wang 001; Mohammad Tehranipoor; Jim Plusquellic (ICCAD, 2008)

Defect Tolerance for Nanoscale Crossbar-Based Devices. - Mohammad Tehranipoor; Reza M. Rad (IEEE Des. Test Comput., 2008)

SCT: A novel approach for testing and configuring nanoscale devices. - Reza M. Rad; Mohammad Tehranipoor (ACM J. Emerg. Technol. Comput. Syst., 2008)

A Novel Fault Localization Technique Based on Deconvolution and Calibration of Power Pad Transients Signals. - Reza M. Rad; Jim Plusquellic (J. Electron. Test., 2009)

Detecting Trojans Through Leakage Current Analysis Using Multiple Supply Pad IDDQ s. - Jim Aarestad; Dhruva Acharyya; Reza M. Rad; Jim Plusquellic (IEEE Trans. Inf. Forensics Secur., 2010)

A Sensitivity Analysis of Power Signal Methods for Detecting Hardware Trojans Under Real Process and Environmental Conditions. - Reza M. Rad; James F. Plusquellic; Mohammad Tehranipoor (IEEE Trans. Very Large Scale Integr. Syst., 2010)

REBEL and TDC: Two embedded test structures for on-chip measurements of within-die path delay variations. - Charles Lamech; Jim Aarestad; Jim Plusquellic; Reza M. Rad; Kanak Agarwal 001 (ICCAD, 2011)

An Experimental Analysis of Power and Delay Signal-to-Noise Requirements for Detecting Trojans and Methods for Achieving the Required Detection Sensitivities. - Charles Lamech; Reza M. Rad; Mohammad Tehranipoor; Jim Plusquellic (IEEE Trans. Inf. Forensics Secur., 2011)

Bit string analysis of Physical Unclonable Functions based on resistance variations in metals and transistors. - Jing Ju; Jim Plusquellic; Raj Chakraborty; Reza M. Rad (HOST, 2012)