An analog (7, 5) convolutional decoder in 65 nm CMOS for low power wireless applications. - Reza Meraji; John B. Anderson; Henrik Sjöland; Viktor Öwall (ISCAS, 2011)

Transistor sizing for a 4-state current mode analog channel decoder in 65-nm CMOS. - Reza Meraji; John B. Anderson; Henrik Sjöland; Viktor Öwall (NORCHIP, 2011)

A Receiver Architecture for Devices in Wireless Body Area Networks. - Henrik Sjöland; John B. Anderson; Carl Bryant; Rohit Chandra; Ove Edfors; Anders J. Johansson; Nafiseh Seyed Mazloum; Reza Meraji; Peter Nilsson 001; Dejan Radjen; Joachim Neves Rodrigues; S. M. Yasser Sherazi; et al. (IEEE J. Emerg. Sel. Topics Circuits Syst., 2012)

A 3μW 500 kb/s ultra low power analog decoder with digital I/O in 65 nm CMOS. - Reza Meraji; John B. Anderson; Henrik Sjöland; Viktor Öwall (ICECS, 2013)

Analog and digital approaches for an energy efficient low complexity channel decoder. - Reza Meraji; S. M. Yasser Sherazi; John B. Anderson; Henrik Sjöland; Viktor Öwall (ISCAS, 2013)

Ultra low power transceivers for wireless sensors and body area networks. - Henrik Sjöland; John B. Anderson; Carl Bryant; Rohit Chandra; Ove Edfors; Anders J. Johansson; Nafiseh Seyed Mazloum; Reza Meraji; Peter Nilsson 001; Dejan Radjen; Joachim Neves Rodrigues; S. M. Yasser Sherazi; et al. (ISMICT, 2014)

Low Power Analog and Digital (7, 5) Convolutional Decoders in 65 nm CMOS. - Reza Meraji; S. M. Yasser Sherazi; John B. Anderson; Henrik Sjöland; Viktor Öwall (IEEE Trans. Circuits Syst. I Regul. Pap., 2015)