Designing Mixed Criticality Applications on Modern Heterogeneous MPSoC Platforms. - Giovani Gracioli; Rohan Tabish; Renato Mancuso 001; Reza Mirosanlou; Rodolfo Pellizzoni; Marco Caccamo (ECRTS, 2019)

3DCAM: A Low Overhead Crosstalk Avoidance Mechanism for TSV-Based 3D ICs. - Reza Mirosanlou; Mohammadkazem Taram; Zahra Shirmohammadi; Seyed Ghassem Miremadi (CoRR, 2019)

DRAMbulism: Balancing Performance and Predictability through Dynamic Pipelining. - Reza Mirosanlou; Mohamed Hassan 002; Rodolfo Pellizzoni (RTAS, 2020)

MCsim: An Extensible DRAM Memory Controller Simulator. - Reza Mirosanlou; Danlu Guo; Mohamed Hassan 002; Rodolfo Pellizzoni (IEEE Comput. Archit. Lett., 2020)

Duetto: Latency Guarantees at Minimal Performance Cost. - Reza Mirosanlou; Mohamed Hassan 002; Rodolfo Pellizzoni (DATE, 2021)

DuoMC: Tight DRAM Latency Bounds with Shared Banks and Near-COTS Performance. - Reza Mirosanlou; Mohamed Hassan 002; Rodolfo Pellizzoni (MEMSYS, 2021)

Parallelism-Aware High-Performance Cache Coherence with Tight Latency Bounds. - Reza Mirosanlou; Mohamed Hassan 002; Rodolfo Pellizzoni (ECRTS, 2022)

X-Stream: Accelerating streaming segments on MPSoCs for real-time applications. - Rohan Tabish; Rodolfo Pellizzoni; Renato Mancuso 001; Giovani Gracioli; Reza Mirosanlou; Marco Caccamo (J. Syst. Archit., 2023)

Lazy Load Scheduling for Mixed-criticality Applications in Heterogeneous MPSoCs. - Tomasz Kloda; Giovani Gracioli; Rohan Tabish; Reza Mirosanlou; Renato Mancuso 001; Rodolfo Pellizzoni; Marco Caccamo (ACM Trans. Embed. Comput. Syst., 2023)