A novel graceful degradable routing algorithm for 3D on-chip networks. - Reza Nakhjavani; Ali Shahabi; Saeed Safari; Zainalabedin Navabi (INA-OCMC@HiPEAC, 2012)

A Case for Common-Case: On FPGA Acceleration of Erasure Coding. - Reza Nakhjavani; Jianwen Zhu (FCCM, 2017)

Rotary Register File: A Micro-Architectural Primitive on FPGA. - Reza Nakhjavani; Jianwen Zhu (FCCM, 2020)