A fast algorithm to reduce 2-dimensional assignment problems to 1-dimensional assignment problems for FPGA-based fault simulation. - Reza Sedaghat (ISCAS (5), 2003)

Verification and fault synthesis algorithm at switch-level. - M. Reza Javaheri; Reza Sedaghat; Leo Kant; Jason Zalev (Microprocess. Microsystems, 2006)

FPGA-Based adaptive digital predistortion for radio-over-fiber links. - Hyunsuk Moon; Reza Sedaghat (Microprocess. Microsystems, 2006)

Transistor-level to gate-level comprehensive fault synthesis for n-input primitive gates. - Reza Sedaghat; Mayuri Kunchwar; Raha Abedi; M. Reza Javaheri (Microelectron. Reliab., 2006)

Dynamic behavior of resistive faults in nanometer technology. - Mayuri Kunchwar; Reza Sedaghat; Vadim Geurkov (Microelectron. Reliab., 2007)

A Novel Delay Fault Testing Methodology for Resistive Faults in Deep Sub-micron Technologies. - M. Reza Javaheri; Reza Sedaghat (CSICC, 2008)

FPGA-based switch-level fault emulation using module-based dynamic partial reconfiguration. - Peter Ming-Han Lee; Reza Sedaghat (Microelectron. Reliab., 2008)

Multi-valued logic mapping of resistive short and open delay-fault testing in deep sub-micron technologies. - M. Reza Javaheri; Reza Sedaghat (Microelectron. Reliab., 2009)

Rapid design space exploration for multi parametric optimization of VLSI designs. - Anirban Sengupta; Reza Sedaghat; Zhipeng Zeng (ISCAS, 2010)

A framework for fast design space exploration using fuzzy search for VLSI computing Architectures. - Zhipeng Zeng; Reza Sedaghat; Anirban Sengupta (ISCAS, 2010)

Switch-level soft error emulation for SET-induced pulses of variable strengths. - Reza Sedaghat; M. Reza Javaheri; Prabhleen K. Kalkat; Jalal Mohammad Chikhe (Microelectron. J., 2010)

Strength violation effect on soft-error detection in sub-micron technology. - M. Reza Javaheri; Reza Sedaghat (Microelectron. Reliab., 2010)

A high level synthesis design flow with a novel approach for efficient design space exploration in case of multi-parametric optimization objective. - Anirban Sengupta; Reza Sedaghat; Zhipeng Zeng (Microelectron. Reliab., 2010)

Application specific processor vs. microblaze soft core RISC processor: FPGA based performance and CPR analysis. - Pallabi Sarkar; Reza Sedaghat; Anirban Sengupta (ACAI, 2011)

Integrated design space exploration based on power-performance trade-off using genetic algorithm. - Anirban Sengupta; Reza Sedaghat; Pallabi Sarkar (ACAI, 2011)

Integrated scheduling, allocation and binding in High Level Synthesis for performance-area tradeoff of digital media applications. - Anirban Sengupta; Reza Sedaghat; Pallabi Sarkar; Summit Sehgal (CCECE, 2011)

Priority function based power efficient rapid Design Space Exploration of scheduling and module selection in high level synthesis. - Anirban Sengupta; Reza Sedaghat; Pallabi Sarkar; Summit Sehgal (CCECE, 2011)

Integrated scheduling, allocation and binding in High Level Synthesis using multi structure genetic algorithm based design space exploration. - Anirban Sengupta; Reza Sedaghat (ISQED, 2011)

Multi-objective efficient design space exploration and architectural synthesis of an application specific processor (ASP). - Anirban Sengupta; Reza Sedaghat; Zhipeng Zeng (Microprocess. Microsystems, 2011)

Switch-level emulation of strength-base soft error detection. - Reza Sedaghat; M. Reza Javaheri; Prabhleen K. Kalkat; Jalal Mohammad Chikhe (Microelectron. Reliab., 2011)

Rapid design space exploration by hybrid fuzzy search approach for optimal architecture determination of multi objective computing systems. - Anirban Sengupta; Reza Sedaghat; Zhipeng Zeng (Microelectron. Reliab., 2011)

Rapid exploration of integrated scheduling and module selection in high level synthesis for application specific processor design. - Anirban Sengupta; Reza Sedaghat; Pallabi Sarkar (Microprocess. Microsystems, 2012)

A multi structure genetic algorithm for integrated design space exploration of scheduling and allocation in high level synthesis for DSP kernels. - Anirban Sengupta; Reza Sedaghat; Pallabi Sarkar (Swarm Evol. Comput., 2012)

Exploration of optimal multi-cycle transient fault secured datapath during high level synthesis based on user area-delay budget. - Anirban Sengupta; Reza Sedaghat (CCECE, 2015)

Swarm intelligence driven design space exploration of optimal k-cycle transient fault secured datapath during high level synthesis based on user power-delay budget. - Anirban Sengupta; Reza Sedaghat (Microelectron. Reliab., 2015)

Optimized Predictive Zonal Search (OPZS) for block-based motion estimation. - Behnaz Abdoli; Reza Sedaghat; Manuchehr Taghiloo (Signal Process. Image Commun., 2015)

An adaptive security framework with extensible computational complexity for cipher systems. - Prathap Siddavaatam; Reza Sedaghat; Min Hsuan Cheng (ICITST, 2016)

A New Adaptable Construction of Modulo Addition with Scalable Security for Stream Ciphers. - Min Hsuan Cheng; Reza Sedaghat; Prathap Siddavaatam (NSS, 2016)

intel-LEACH: An optimal framework for node selection using dynamic clustering for wireless sensor networks. - Prathap Siddavaatam; Reza Sedaghat; Aakriti Tarun Sharma (ICITST, 2017)

A Delta-Diagram Based Synthesis for Cross Layer Optimization Modeling of IoT. - Prathap Siddavaatam; Reza Sedaghat (Trans. Comput. Sci., 2018)

A New Adaptive Security Architecture with Extensible Computation Complexity for Generic Ciphers. - Prathap Siddavaatam; Reza Sedaghat (J. Hardw. Syst. Secur., 2019)

Grey Wolf Optimizer Driven design space exploration: A novel framework for multi-objective trade-off in architectural synthesis. - Prathap Siddavaatam; Reza Sedaghat (Swarm Evol. Comput., 2019)

Novel Hybrid GWO-WOA and BAT-PSO Algorithms for Solving Design Optimization Problems. - Noel Jose Thengappurackal Laiju; Reza Sedaghat; Prathap Siddavaatam (Trans. Comput. Sci., 2021)

A New Bio-heuristic Hybrid Optimization for Constrained Continuous Problems. - Prathap Siddavaatam; Reza Sedaghat (Trans. Comput. Sci., 2021)

A Novel Machine Learning Framework for Covid-19 Image Classification with Bio-heuristic Optimization. - Prathap Siddavaatam; Reza Sedaghat; Nahid Sahelgozin (Trans. Comput. Sci., 2022)