A B-s complement continuous valued digit adder. - Ricardo Andres Aroca; Majid Ahmadi; R. Hashemian; Graham A. Jullien; William C. Miller (ICECS, 2002)

Towards a sub-2.5V, 100-Gb/s Serial Transceiver. - Sorin P. Voinigescu; Ricardo Andres Aroca; Timothy O. Dickson; Sean T. Nicolson; Theodoros Chalvatzis; Pascal Chevalier 002; Patrice Garcia; Christophe Gamier; Bernard Sautreuil (CICC, 2007)

Low-Voltage Topologies for 40-Gb/s Circuits in Nanoscale CMOS. - Theodoros Chalvatzis; Kenneth H. K. Yau; Ricardo Andres Aroca; Peter Schvan; Ming-Ta Yang; Sorin P. Voinigescu (IEEE J. Solid State Circuits, 2007)

A zero-IF 60GHz transceiver in 65nm CMOS with ≫ 3.5Gb/s links. - Alexander Tomkins; Ricardo Andres Aroca; Takuji Yamamoto; Sean T. Nicolson; Yoshiyasu Doi; Sorin P. Voinigescu (CICC, 2008)

A 95GHz Receiver with Fundamental-Frequency VCO and Static Frequency Divider in 65nm Digital CMOS. - Ekaterina Laskin; Mehdi Khanpour; Ricardo Andres Aroca; Keith K. W. Tang; Patrice Garcia; Sorin P. Voinigescu (ISSCC, 2008)

A Large Swing, 40-Gb/s SiGe BiCMOS Driver With Adjustable Pre-Emphasis for Data Transmission Over 75Ω Coaxial Cable. - Ricardo Andres Aroca; Sorin P. Voinigescu (IEEE J. Solid State Circuits, 2008)

A Zero-IF 60 GHz 65 nm CMOS Transceiver With Direct BPSK Modulation Demonstrating up to 6 Gb/s Data Rates Over a 2 m Wireless Link. - Alexander Tomkins; Ricardo Andres Aroca; Takuji Yamamoto; Sean T. Nicolson; Yoshiyasu Doi; Sorin P. Voinigescu (IEEE J. Solid State Circuits, 2009)

A 2.4-Vpp 60-Gb/s CMOS Driver With Digitally Variable Amplitude and Pre-Emphasis Control at Multiple Peaking Frequencies. - Ricardo Andres Aroca; Peter Schvan; Sorin P. Voinigescu (IEEE J. Solid State Circuits, 2011)