Comparative evaluation of Body Biasing and Voltage Scaling for Low-Power Design on 28nm UTBB FD-SOI Technology. - Ricardo Gomez Gomez; Edwige Bano; Sylvain Clerc (ISLPED, 2019)

A Performance-Flexible Energy-Optimized Automotive-Grade Cortex-R4F SoC through Combined AVS/ABB/Bias-in-Memory-Array Closed-Loop Regulation in 28nm FD-SOI. - Ricardo Gomez Gomez; Edwige Bano; Andreia Cathelin; Sylvain Clerc (VLSI Circuits, 2020)

Circuit Monitoring Across Design Life-Cycle in 28nm FD-SOI and 40nm Bulk CMOS technologies. - Sylvain Clerc; Kedar Janardan Dhori; Robin M. Wilson; Rohit Goel; Sébastien Marchal; Franck Pourchon; Christian Dutto; Ricardo Gomez Gomez (ESSCIRC, 2021)