A Scheme to Design Concurrent Error Detection Techniques for the Fast Fourier Transform Implemented in SRAM-Based FPGAs. - Ricardo Gonzalez-Toral; Pedro Reviriego; Juan Antonio Maestro; Zhen Gao 005 (IEEE Trans. Computers, 2018)

Reducing the Power Consumption of Fault Tolerant Registers Through Hybrid Protection. - Ricardo Gonzalez-Toral; Shanshan Liu 001; Pedro Reviriego; Juan Antonio Maestro (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)

Protection Scheme for Star Tracker Images. - Luis Alberto Aranda; Pedro Reviriego; Ricardo Gonzalez-Toral; Juan Antonio Maestro (IEEE Trans. Aerosp. Electron. Syst., 2019)

An ALU Protection Methodology for Soft Processors on SRAM-Based FPGAs. - Alexis Ramos; Ricardo Gonzalez-Toral; Pedro Reviriego; Juan Antonio Maestro (IEEE Trans. Computers, 2019)