Taking advantage of LVDS input buffers to implement sigma-delta A/D converters in FPGAs. - Fabio Sousa; Volker Mauer; Neimar Duarte; Ricardo P. Jasinski; Volnei A. Pedroni (ISCAS (1), 2004)

Fault-Tolerance Techniques for SRAM-Based FPGAs. - Ricardo P. Jasinski (Comput. J., 2007)

Achieving near-MLD performance with soft information-set decoders implemented in FPGAs. - Antonio Gortan; Ricardo P. Jasinski; Walter Godoy Jr.; Volnei A. Pedroni (APCCAS, 2010)

Panning sorter: A minimal-size architecture for hardware implementation of 2D Data Sorting Coprocessors. - Volnei A. Pedroni; Ricardo P. Jasinski; Ricardo U. Pedroni (APCCAS, 2010)

Analysis and Preliminary Measurements of Radiated Emissions in an Asynchronous Circuit versus its Synchronous Counterpart. - Rui A. L. de Cristo; Ricardo P. Jasinski; Volnei A. Pedroni (ReConFig, 2010)

An Improved GF(2) Matrix Inverter with Linear Time Complexity. - Ricardo P. Jasinski; Volnei A. Pedroni; Antonio Gortan; Walter Godoy Jr. (ReConFig, 2010)

Jari Nurmi: Processor Design - System-on-Chip Computing for ASICs and FPGAs. Springer (2007) ISBN 978-1-4020-5529-4. - Ricardo P. Jasinski (Comput. J., 2010)

A very efficient single-iteration oldest-out data sorter. - Volnei A. Pedroni; Ricardo P. Jasinski; Ricardo U. Pedroni (ISCAS, 2011)

A new hardware coprocessor for accelerating Notification-Oriented applications. - Eduardo Peters; Ricardo P. Jasinski; Volnei A. Pedroni; Jean M. Simao (FPT, 2012)

Moving Network Protection from Software to Hardware: An Energy Efficiency Analysis. - André Luiz Pereira de França; Ricardo Pereira Jasinski; Volnei Antonio Pedroni; Altair Olivo Santin (ISVLSI, 2014)

The energy cost of network security: A hardware vs. software comparison. - André Luiz Pereira de França; Ricardo P. Jasinski; Paulo Cemin; Volnei A. Pedroni; Altair Olivo Santin (ISCAS, 2015)

Extraction of spatio-temporal features based on a hardware approach for a no-reference objective video quality metric. - Marcelo de Oliveira Rosa; Caio Cesar Viana da Silva; Wyllian Bezerra da Silva; Ricardo P. Jasinski; Volnei Antonio Pedroni; Alexandre de Almeida Prado Pohl (BMSB, 2016)

Towards an Energy-Efficient Anomaly-Based Intrusion Detection Engine for Embedded Systems. - Eduardo Viegas 001; Altair Olivo Santin; André França 001; Ricardo P. Jasinski; Volnei A. Pedroni; Luiz S. Oliveira (IEEE Trans. Computers, 2017)

A reliable and energy-efficient classifier combination scheme for intrusion detection in embedded systems. - Eduardo Viegas 001; Altair Olivo Santin; Luiz Oliveira 003; André França 001; Ricardo P. Jasinski; Volnei A. Pedroni (Comput. Secur., 2018)