Code Compression Based on Operand Factorization. - Guido Araujo; Paulo Centoducatte; Mario Lúcio Côrtes; Ricardo Pannain (MICRO, 1998)

Compressed Code Execution on DSP Architectures. - Paulo Centoducatte; Ricardo Pannain; Guido Araujo (ISSS, 1999)

Compressão de codigo de programa usando fatoração de operandos. - Ricardo Pannain (1999)

Expression-tree-based algorithms for code compression on embedded RISC architectures. - Guido Araujo; Paulo Centoducatte; Rodolfo Azevedo; Ricardo Pannain (IEEE Trans. Very Large Scale Integr. Syst., 2000)

SPARC16: A New Compression Approach for the SPARC Architecture. - Leonardo Luiz Ecco; Bruno Cardoso Lopes; Eduardo Candido Xavier; Ricardo Pannain; Paulo Centoducatte; Rodolfo Jardim de Azevedo (SBAC-PAD, 2009)

Bringing Energy Information to the Instruction Set. - Bruno Bonotto; Lucas Francisco Wanner; Ricardo Pannain; Rodolfo Azevedo (SBESC, 2020)

Using Logging-on-Write to Improve Non-Volatile Memory Checkpoints via Processing-in-Memory. - Kleber Kruger; Ricardo Pannain; Rodolfo Azevedo (SBAC-PAD, 2023)

DONUTS: An efficient method for checkpointing in non-volatile memories. - Kleber Kruger; Ricardo Pannain; Rodolfo Azevedo (Concurr. Comput. Pract. Exp., 2023)