Ground deformation monitoring exploiting SAR permanent scatterers. - Carlo Colesanti; Riccardo Locatelli; Fabrizio Novali (IGARSS, 2002)

Permanent Scatterers: precision assessment and multi-platform analysis. - Carlo Colesanti; Alessandro Ferretti; Riccardo Locatelli; Fabrizio Novali; Giuliano Savio (IGARSS, 2003)

RFI Cancellation in DMT VDSL: A Digital Frequency Domain Scheme. - Riccardo Locatelli; Silvia Brini; Luca Fanucci; Christophe Del Toso (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2003)

VLSI Design of a Digital RFI Cancellation Scheme for VDSL Transceivers. - Luca Fanucci; Riccardo Locatelli; Esa Petri (DSD, 2004)

Spidergon: a novel on-chip communication network. - Marcello Coppola; Riccardo Locatelli; Giuseppe Maruccia; Lorenzo Pieralisi; Alberto Scandurra (SoC, 2004)

OCCN: a NoC modeling framework for design exploration. - Marcello Coppola; Stephane Curaba; Miltos D. Grammatikakis; Riccardo Locatelli; Giuseppe Maruccia; Francesco Papariello (J. Syst. Archit., 2004)

Design methodologies and advanced architectures for system on chip platforms: focus on communication. - Riccardo Locatelli (2004)

Skew Insensitive Physical Links for Network on Chip. - Daniele Mangano; Riccardo Locatelli; Alberto Scandurra; Carlo Pistritto; Marcello Coppola; Luca Fanucci; Francesco Vitullo; Dario Zandri (Nano-Net, 2006)

Mapping and Topology Customization Approaches for Application-Specific STNoC Designs. - Gianluca Palermo; Giovanni Mariani; Cristina Silvano; Riccardo Locatelli; Marcello Coppola (ASAP, 2007)

NoC Topologies Exploration based on Mapping and Simulation Models. - Luciano Bononi; Nicola Concer; Miltos D. Grammatikakis; Marcello Coppola; Riccardo Locatelli (DSD, 2007)

Application-Specific Topology Design Customization for STNoC. - Gianluca Palermo; Cristina Silvano; Giovanni Mariani; Riccardo Locatelli; Marcello Coppola (DSD, 2007)

A topology design customization approach for STNoC. - Gianluca Palermo; Giovanni Mariani; Cristina Silvano; Riccardo Locatelli; Marcello Coppola (Nano-Net, 2007)

Design of a HW/SW Communication Infrastructure for a Heterogeneous Reconfigurable Processor. - Antonio Deledda; Claudio Mucci; Arseni Vitkovski; Philippe Bonnot 001; Arnaud Grasset; Philippe Millet; Matthias Kühnle; Florian Ries; Michael Hübner 001; Jürgen Becker 001; Massimo Coppola; Lorenzo Pieralisi; et al. (DATE, 2008)

LIME: A Low-latency and Low-complexity On-chip Mesochronous Link with Integrated Flow Control. - Sergio Saponara; Francesco Vitullo; Riccardo Locatelli; Philippe Teninge; Marcello Coppola; Luca Fanucci (DSD, 2008)

An Interconnect Strategy for a Heterogeneous, Reconfigurable SoC. - Matthias Kühnle; Michael Hübner 001; Jürgen Becker 001; Antonio Deledda; Claudio Mucci; Florian Ries; Marcello Coppola; Lorenzo Pieralisi; Riccardo Locatelli; Giuseppe Maruccia; Tommaso DeMarco; Fabio Campi (IEEE Des. Test Comput., 2008)

Low-Complexity Link Microarchitecture for Mesochronous Communication in Networks-on-Chip. - Francesco Vitullo; Nicola E. L'Insalata; Esa Petri; Sergio Saponara; Luca Fanucci; Michele Casula; Riccardo Locatelli; Marcello Coppola (IEEE Trans. Computers, 2008)

CTC: An end-to-end flow control protocol for multi-core systems-on-chip. - Nicola Concer; Luciano Bononi; Michael Soulie; Riccardo Locatelli; Luca P. Carloni (NOCS, 2009)

A reusable coverage-driven verification environment for Network-on-Chip communication in embedded system platforms. - Francesco Vitullo; Sergio Saponara; Esa Petri; Michele Casula; Luca Fanucci; Giuseppe Maruccia; Riccardo Locatelli; Marcello Coppola (WISES, 2009)

Error resilience of intra-die and inter-die communication with 3D spidergon STNoC. - Vladimir Pasca; Lorena Anghel; Claudia Rusu; Riccardo Locatelli; Massimo Coppola (DATE, 2010)

The Connection-Then-Credit Flow Control Protocol for Heterogeneous Multicore Systems-on-Chip. - Nicola Concer; Luciano Bononi; Michael Soulie; Riccardo Locatelli; Luca P. Carloni (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010)

EEEP: an extreme end to end flow control protocol for SDRAM access through networks on chip. - Khaldon Hassan; Frédéric Pétrot; Riccardo Locatelli; Marcello Coppola (INA-OCMC@HiPEAC, 2011)

Efficient routing implementation in complex systems-on-chip. - José Cano 001; José Flich; José Duato; Marcello Coppola; Riccardo Locatelli (NOCS, 2011)

Coverage-Driven Verification of HDL IP Cores - Case Study of a Router for Network-on-Chip Communication in Embedded Systems. - Sergio Saponara; Francesco Vitullo; Esa Petri; Luca Fanucci; Marcello Coppola; Riccardo Locatelli (Solutions on Embedded Systems, 2011)

Efficient Routing in Heterogeneous SoC Designs with Small Implementation Overhead. - José Cano 001; José Flich; Antoni Roca 001; José Duato; Marcello Coppola; Riccardo Locatelli (IEEE Trans. Computers, 2014)

Design of an NoC Interface Macrocell with Hardware Support of Advanced Networking Functionalities. - Sergio Saponara; Tony Bacchillone; Esa Petri; Luca Fanucci; Riccardo Locatelli; Marcello Coppola (IEEE Trans. Computers, 2014)

Design and Implementation on FPGA of a HW Accelerator for Post-Quantum RLWE Polynomial Operations. - Stefano Di Matteo; Sergio Saponara; Riccardo Locatelli (ApplePies, 2022)