Symbolic synthesis of clock-gating logic for power optimization of control-oriented synchronous networks. - Luca Benini; Giovanni De Micheli; Enrico Macii; Massimo Poncino; Riccardo Scarsi (ED&TC, 1997)

Fast power estimation for deterministic input streams. - Luca Benini; Giovanni De Micheli; Enrico Macii; Massimo Poncino; Riccardo Scarsi (ICCAD, 1997)

Symbolic algorithms for layout-oriented synthesis of pass transistor logic circuits. - Fabrizio Ferrandi; Alberto Macii; Enrico Macii; Massimo Poncino; Riccardo Scarsi; Fabio Somenzi (ICCAD, 1998)

Synthesis of Low-Overhead Interfaces for Power-Efficient Communication over Wide Buses. - Luca Benini; Alberto Macii; Enrico Macii; Massimo Poncino; Riccardo Scarsi (DAC, 1999)

Glitch Power Minimization by Gate Freezing. - Luca Benini; Giovanni De Micheli; Alberto Macii; Enrico Macii; Massimo Poncino; Riccardo Scarsi (DATE, 1999)

Regression-Based Macromodeling for Delay Estimation of Behavioral Components. - Alberto Macii; Enrico Macii; Giuseppe Odasso; Massimo Poncino; Riccardo Scarsi (Great Lakes Symposium on VLSI, 1999)

Symbolic synthesis of clock-gating logic for power optimization of synchronous controllers. - Luca Benini; Giovanni De Micheli; Enrico Macii; Massimo Poncino; Riccardo Scarsi (ACM Trans. Design Autom. Electr. Syst., 1999)

A Discrete-Time Battery Model for High-Level Power Estimation. - Luca Benini; Giuliano Castelli; Alberto Macii; Enrico Macii; Massimo Poncino; Riccardo Scarsi (DATE, 2000)

A spatially-adaptive bus interface for low-switching communication (poster session). - Andrea Acquaviva; Riccardo Scarsi (ISLPED, 2000)

Battery-Driven Dynamic Power Management of Portable Systems. - Luca Benini; Giuliano Castelli; Alberto Macii; Enrico Macii; Riccardo Scarsi (ISSS, 2000)

A multilevel engine for fast power simulation of realistic inputstreams. - Luca Benini; Giovanni De Micheli; Enrico Macii; Massimo Poncino; Riccardo Scarsi (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000)

Architectures and synthesis algorithms for power-efficient businterfaces. - Luca Benini; Alberto Macii; Massimo Poncino; Riccardo Scarsi (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000)

Glitch power minimization by selective gate freezing. - Luca Benini; Giovanni De Micheli; Alberto Macii; Enrico Macii; Massimo Poncino; Riccardo Scarsi (IEEE Trans. Very Large Scale Integr. Syst., 2000)

Extending lifetime of portable systems by battery scheduling. - Luca Benini; Giuliano Castelli; Alberto Macii; Enrico Macii; Massimo Poncino; Riccardo Scarsi (DATE, 2001)

Battery-Driven Dynamic Power Management. - Luca Benini; Giuliano Castelli; Alberto Macii; Riccardo Scarsi (IEEE Des. Test Comput., 2001)

Discrete-time battery models for system-level low-power design. - Luca Benini; Giuliano Castelli; Alberto Macii; Enrico Macii; Massimo Poncino; Riccardo Scarsi (IEEE Trans. Very Large Scale Integr. Syst., 2001)

Stream synthesis for efficient power simulation based on spectral transforms. - Alberto Macii; Enrico Macii; Massimo Poncino; Riccardo Scarsi (IEEE Trans. Very Large Scale Integr. Syst., 2001)

Scheduling battery usage in mobile systems. - Luca Benini; Alberto Macii; Enrico Macii; Massimo Poncino; Riccardo Scarsi (IEEE Trans. Very Large Scale Integr. Syst., 2003)