A 72-mW CMOS 802.11a direct conversion front-end with 3.5-dB NF and 200-kHz 1/f noise corner. - Mario Valla; Giampiero Montagna; Rinaldo Castello; Riccardo Tonietto; Ivan Bietti (IEEE J. Solid State Circuits, 2005)

A 5.4mW GPS CMOS Quadrature Front-End Based on a Single-Stage LNA-Mixer-VCO. - Antonio Liscidini; Andrea Mazzanti; Riccardo Tonietto; Luca Vandi; Pietro Andreani; Rinaldo Castello (ISSCC, 2006)

Single-Stage Low-Power Quadrature RF Receiver Front-End: The LMV Cell. - Antonio Liscidini; Andrea Mazzanti; Riccardo Tonietto; Luca Vandi; Pietro Andreani; Rinaldo Castello (IEEE J. Solid State Circuits, 2006)

Insights into wideband fractional All-Digital PLLs for RF applications. - Enrico Temporiti; Colin Weltin-Wu; Daniele Baldi; Riccardo Tonietto; Francesco Svelto (CICC, 2009)

A 3 GHz Fractional All-Digital PLL With a 1.8 MHz Bandwidth Implementing Spur Reduction Techniques. - Enrico Temporiti; Colin Weltin-Wu; Daniele Baldi; Riccardo Tonietto; Francesco Svelto (IEEE J. Solid State Circuits, 2009)