A comparison of gold and superconductors used as air-bridge and microstrip interconnects for high-speed VLSI. - Jeffrey A. Dykstra; Richard B. Brown (IEEE J. Solid State Circuits, 1989)

A high resolution current stimulating probe for use in neural prostheses. - Changhyun Kim; D. Kang; Richard B. Brown; Kensall D. Wise (Great Lakes Symposium on VLSI, 1991)

Implementing a Cache for a High-Performance GaAs Microprocessor. - Kunle Olukotun; Trevor N. Mudge; Richard B. Brown (ISCA, 1991)

The Design of a Microsupercomputer. - Trevor N. Mudge; Richard B. Brown; William P. Bimingham; Jeffrey A. Dykstra; Ayman I. Kayssi; Ronald J. Lomax; Kunle Olukotun; Karem A. Sakallah; Raymond A. Milano (Computer, 1991)

Multilevel optimization in the design of a high-performance GaAs microcomputer. - Oyekunle A. Olukotun; Richard B. Brown; Ronald J. Lomax; Trevor N. Mudge; Karem A. Sakallah (IEEE J. Solid State Circuits, 1991)

Performance Optimization of Pipelined Primary Caches. - Kunle Olukotun; Trevor N. Mudge; Richard B. Brown (ISCA, 1992)

A microarchitectural performance evaluation of a 3.2 Gbyte/s microprocessor bus. - Tim J. Stanley; Michael Upton; Patrick Sherhart; Trevor N. Mudge; Richard B. Brown (MICRO, 1993)

Gallium-arsenide process evaluation based on a RISC microprocessor example. - Richard B. Brown; Michael Upton; Ajay Chandna; Thomas R. Huff; Trevor N. Mudge; Richard E. Oettel (IEEE J. Solid State Circuits, 1993)

Resource Allocation in a High Clock Rate Microprocessor. - Michael Upton; Thomas R. Huff; Trevor N. Mudge; Richard B. Brown (ASPLOS, 1994)

Design Tradeoffs for Software-Managed TLBs. - Richard Uhlig; David Nagle; Tim J. Stanley; Trevor N. Mudge; Stuart Sechrest; Richard B. Brown (ACM Trans. Comput. Syst., 1994)

An asynchronous GaAs MESFET static RAM using a new current mirror memory cell. - Ajay Chandna; Richard B. Brown (IEEE J. Solid State Circuits, 1994)

The Aurora RAM Compiler. - Ajay Chandna; C. David Kibler; Richard B. Brown; Mark Roberts; Karem A. Sakallah (DAC, 1995)

Power rail logic: a low power logic style for digital GaAs circuits. - Ajay Chandna; Richard B. Brown; David Putti; C. David Kibler (IEEE J. Solid State Circuits, 1995)

Ravel-XL: a hardware accelerator for assigned-delay compiled-code logic gate simulation. - Michael A. Riepe; João P. Marques Silva; Karem A. Sakallah; Richard B. Brown (IEEE Trans. Very Large Scale Integr. Syst., 1996)

Multilevel Optimization of Pipelined Caches. - Kunle Olukotun; Trevor N. Mudge; Richard B. Brown (IEEE Trans. Computers, 1997)

Congestion Driven Quadratic Placement. - Phiroze N. Parakh; Richard B. Brown; Karem A. Sakallah (DAC, 1998)

High-level design verification of microprocessors via error modeling. - David Van Campenhout; Hussain Al-Asaad; John P. Hayes; Trevor N. Mudge; Richard B. Brown (ACM Trans. Design Autom. Electr. Syst., 1998)

Overview of complementary GaAs technology for high-speed VLSI circuits. - Richard B. Brown; Bruce Bernhardt; M. LaMacchia; J. Abrokwah; Phiroze N. Parakh; Todd D. Basso; Spencer M. Gold; S. Stetson; Claude R. Gauthier; D. Foster; B. Crawforth; T. McQuire; et al. (IEEE Trans. Very Large Scale Integr. Syst., 1998)

A Quantitative Approach to Nonlinear Process Design Rule Scaling. - Spencer M. Gold; Richard B. Brown; Bruce Bernhardt (ARVLSI, 1999)

Crosstalk constrained global route embedding. - Phiroze N. Parakh; Richard B. Brown (ISPD, 1999)

CGaAs PowerPC FXU. - Alan J. Drake; Todd D. Basso; Spencer M. Gold; Keith L. Kraver; Phiroze N. Parakh; Claude R. Gauthier; P. Sean Stetson; Richard B. Brown (DAC, 2000)

A microprocessor design project in an introductory VLSI course. - Richard B. Brown; Ronald J. Lomax; Gordon A. Carichner; Alan J. Drake (IEEE Trans. Educ., 2000)

Dynamic Receiver Biasing For Inter-Chip Communication. - Claude R. Gauthier; Jayakumaran Sivagnaname; Richard B. Brown (ARVLSI, 2001)

Increasing the number of effective registers in a low-power processor using a windowed register file. - Rajiv A. Ravindran; Robert M. Senger; Eric D. Marsman; Ganesh S. Dasika; Matthew R. Guthaus; Scott A. Mahlke; Richard B. Brown (CASES, 2003)

Resonant clocking using distributed parasitic capacitance. - Alan J. Drake; Kevin J. Nowka; Tuyet Nguyen; Jeffrey L. Bums; Richard B. Brown (CICC, 2003)

A 2.3Gb/s fully integrated and synthesizable AES Rijndael core. - Nam Sung Kim; Trevor N. Mudge; Richard B. Brown (CICC, 2003)

A 16-bit mixed-signal microsystem with integrated CMOS-MEMS clock reference. - Robert M. Senger; Eric D. Marsman; Michael S. McCorquodale; Fadi H. Gebara; Keith L. Kraver; Matthew R. Guthaus; Richard B. Brown (DAC, 2003)

A Top-Down Microsystems Design Methodology and Associated Challenges . - Michael S. McCorquodale; Fadi H. Gebara; Keith L. Kraver; Eric D. Marsman; Robert M. Senger; Richard B. Brown (DATE, 2003)

New digital circuit techniques for total standby leakage reduction in nano-scale SOI technology. - Koushik K. Das; Rajiv V. Joshi; Ching-Te Chuang; Peter W. Cook; Richard B. Brown (ESSCIRC, 2003)

Circuit techniques for gate and sub-threshold leakage minimization in future CMOS technologies. - Rahul M. Rao; Jeffrey L. Burns; Richard B. Brown (ESSCIRC, 2003)

A Heuristic to Determine Low Leakage Sleep State Vectors for CMOS Combinational Circuits. - Rahul M. Rao; Frank Liu 001; Jeffrey L. Burns; Richard B. Brown (ICCAD, 2003)

Top-down and bottom-up approaches to stable clock synthesis. - Michael S. McCorquodale; Mei Kim Ding; Richard B. Brown (ICECS, 2003)

Study and simulation of CMOS LC oscillator phase noise and jitter. - Michael S. McCorquodale; Mei Kim Ding; Richard B. Brown (ISCAS (1), 2003)

New optimal design strategies and analysis of ultra-low leakage circuits for nano-scale SOI technology. - Koushik K. Das; Rajiv V. Joshi; Ching-Te Chuang; Peter W. Cook; Richard B. Brown (ISLPED, 2003)

Efficient techniques for gate leakage estimation. - Rahul M. Rao; Jeffrey L. Burns; Anirudh Devgan; Richard B. Brown (ISLPED, 2003)

Novel Circuit Styles for Minimization of Floating Body Effects in Scaled PD-SOI CMOS. - Koushik K. Das; Richard B. Brown (ISVLSI, 2003)

Evaluation of Dynamic-Threshold Logic for Low-Power VLSI Design in 0.13um PD-SOI. - Alan J. Drake; Kevin J. Nowka; Richard B. Brown (VLSI-SOC, 2003)

Microsystem and SoC Design with UMIPS. - Michael S. McCorquodale; Eric D. Marsman; Robert M. Senger; Fadi H. Gebara; Richard B. Brown (VLSI-SOC, 2003)

Ultra Low-Leakage Power Strategies for Sub-1 V VLSI: Novel Circuit Styles and Design Methodologies for Partially Depleted Silicon-On-Insulator (PD-SOI) CMOS Technology. - Koushik K. Das; Richard B. Brown (VLSI Design, 2003)

Micropotentiometric sensors. - Hakhyun Nam; Geun S. Cha; Timothy D. Strong; Jeonghan Ha; Jun Ho Sim; Robert W. Hower; Steven M. Martin; Richard B. Brown (Proc. IEEE, 2003)

Design, Implementation, and Verification of a CMOS-Integrated Chemical Sensor System. - Steven M. Martin; Timothy D. Strong; Richard B. Brown (ICMENS, 2004)

A low-voltage, chemical sensor interface for systems-on-chip: the fully-differential potentiostat. - Steven M. Martin; Fadi H. Gebara; Timothy D. Strong; Richard B. Brown (ISCAS (4), 2004)

Approaches to run-time and standby mode leakage reduction in global buses. - Rahul M. Rao; Kanak Agarwal 001; Dennis Sylvester; Richard B. Brown; Kevin J. Nowka; Sani R. Nassif (ISLPED, 2004)

Analysis and Optimization of Enhanced MTCMOS Scheme. - Rahul M. Rao; Jeffrey L. Burns; Richard B. Brown (VLSI Design, 2004)

Resonant clocking using distributed parasitic capacitance. - Alan J. Drake; Kevin J. Nowka; Tuyet Nguyen; Jeffrey L. Burns; Richard B. Brown (IEEE J. Solid State Circuits, 2004)

Compiler Managed Dynamic Instruction Placement in a Low-Power Code Cache. - Rajiv A. Ravindran; Pracheeti D. Nagarkar; Ganesh S. Dasika; Eric D. Marsman; Robert M. Senger; Scott A. Mahlke; Richard B. Brown (CGO, 2005)

Optimization objectives and models of variation for statistical gate sizing. - Matthew R. Guthaus; Natesan Venkateswaran; Vladimir Zolotov; Dennis Sylvester; Richard B. Brown (ACM Great Lakes Symposium on VLSI, 2005)

Power-aware global signaling strategies. - Rahul M. Rao; Kanak Agarwal 001; Dennis Sylvester; Himanshu Kaul; Richard B. Brown; Sani R. Nassif (ISCAS (1), 2005)

Dynamically Pulsed MTCMOS with Bus Encoding for Total Power and Crosstalk Minimization. - Harmander Deogun; Rahul M. Rao; Dennis Sylvester; Richard B. Brown; Kevin J. Nowka (ISQED, 2005)

Parametric Yield Analysis and Constrained-Based Supply Voltage Optimization. - Rahul M. Rao; Kanak Agarwal 001; Anirudh Devgan; Kevin J. Nowka; Dennis Sylvester; Richard B. Brown (ISQED, 2005)

Controlled-Load Limited Switch Dynamic Logic Circuit. - Jayakumaran Sivagnaname; Hung C. Ngo; Kevin J. Nowka; Robert K. Montoye; Richard B. Brown (ISQED, 2005)

A CMOS-integrated microinstrument for trace detection of heavy metals. - Steven M. Martin; Fadi H. Gebara; Brian J. Larivee; Richard B. Brown (IEEE J. Solid State Circuits, 2005)

Partitioning Variables across Register Windows to Reduce Spill Code in a Low-Power Processor. - Rajiv A. Ravindran; Robert M. Senger; Eric D. Marsman; Ganesh S. Dasika; Matthew R. Guthaus; Scott A. Mahlke; Richard B. Brown (IEEE Trans. Computers, 2005)

Process-induced skew reduction in nominal zero-skew clock trees. - Matthew R. Guthaus; Dennis Sylvester; Richard B. Brown (ASP-DAC, 2006)

Newton: a library-based analytical synthesis tool for RF-MEMS resonators. - Michael S. McCorquodale; James McCann; Richard B. Brown (ASP-DAC, 2006)

A 16-bit, low-power microsystem with monolithic MEMS-LC clocking. - Robert M. Senger; Eric D. Marsman; Michael S. McCorquodale; Richard B. Brown (ASP-DAC, 2006)

Clock buffer and wire sizing using sequential programming. - Matthew R. Guthaus; Dennis Sylvester; Richard B. Brown (DAC, 2006)

DSP architecture for cochlear implants. - Eric D. Marsman; Robert M. Senger; Gordy A. Carichner; Sundus Kubba; Michael S. McCorquodale; Richard B. Brown (ISCAS, 2006)

Low-latency, HDL-synthesizable dynamic clock frequency controller with self-referenced hybrid clocking. - Robert M. Senger; Eric D. Marsman; Gordy A. Carichner; Sundus Kubba; Michael S. McCorquodale; Richard B. Brown (ISCAS, 2006)

Integrated electrochemical neurosensors. - Timothy D. Strong; Steven M. Martin; Robert F. Franklin; Richard B. Brown (ISCAS, 2006)

A dual-VDD boosted pulsed bus technique for low power and low leakage operation. - Harmander Deogun; Robert M. Senger; Dennis Sylvester; Richard B. Brown; Kevin J. Nowka (ISLPED, 2006)

Gate-Induced Barrier Field Effect Transistor (GBFET) - A New Thin Film Transistor for Active Matrix Liquid Crystal Display Systems. - Jayakumaran Sivagnaname; Hung C. Ngo; Kevin J. Nowka; Robert K. Montoye; Richard B. Brown (VLSI Design, 2006)

A Monolithic and Self-Referenced RF LC Clock Generator Compliant With USB 2.0. - Michael S. McCorquodale; Justin D. O'Day; Scott M. Pernia; Gordon A. Carichner; Sundus Kubba; Richard B. Brown (IEEE J. Solid State Circuits, 2007)

Parametric Yield Analysis and Optimization in Leakage Dominated Technologies. - Kanak Agarwal 001; Rahul M. Rao; Dennis Sylvester; Richard B. Brown (IEEE Trans. Very Large Scale Integr. Syst., 2007)

Clock tree synthesis with data-path sensitivity matching. - Matthew R. Guthaus; Dennis Sylvester; Richard B. Brown (ASP-DAC, 2008)

A 25MHz all-CMOS reference clock generator for XO-replacement in serial wire interfaces. - Michael S. McCorquodale; Scott M. Pernia; Sundus Kubba; Gordy A. Carichner; Justin D. O'Day; Eric D. Marsman; Jonathan J. Kuhn; Richard B. Brown (ISCAS, 2008)

On-Chip Process Variation Detection and Compensation Using Delay and Slew-Rate Monitoring Circuits. - Amlan Ghosh; Rahul M. Rao; Ching-Te Chuang; Richard B. Brown (ISQED, 2008)

A 0.5-to-480MHz Self-Referenced CMOS Clock Generator with 90ppm Total Frequency Error and Spread-Spectrum Capability. - Michael S. McCorquodale; Scott M. Pernia; Justin D. O'Day; Gordon A. Carichner; Eric D. Marsman; Nam Nguyen; Sundus Kubba; Si Nguyen; Jonathan J. Kuhn; Richard B. Brown (ISSCC, 2008)

On-Chip Process Variation Detection Using Slew-Rate Monitoring Circuit. - Amlan Ghosh; Rahul M. Rao; Jae-Joon Kim; Ching-Te Chuang; Richard B. Brown (VLSI Design, 2008)

Reducing parasitic BJT effects in partially depleted SOI digital logic circuits. - Koushik K. Das; Ching-Te Chuang; Richard B. Brown (Microelectron. J., 2008)

A Precise Negative Bias Temperature Instability Sensor using Slew-rate Monitor Circuitry. - Amlan Ghosh; Richard B. Brown; Rahul M. Rao; Ching-Te Chuang (ISCAS, 2009)

A centralized supply voltage and local body bias-based compensation approach to mitigate within-die process variation. - Amlan Ghosh; Rahul M. Rao; Richard B. Brown (ISLPED, 2009)

A 25-MHz Self-Referenced Solid-State Frequency Source Suitable for XO-Replacement. - Michael S. McCorquodale; Gordon A. Carichner; Justin D. O'Day; Scott M. Pernia; Sundus Kubba; Eric D. Marsman; Jonathan J. Kuhn; Richard B. Brown (IEEE Trans. Circuits Syst. I Regul. Pap., 2009)

Analog Circuit Design Methodologies to Improve Negative-Bias Temperature Instability Degradation. - Amlan Ghosh; Rob Franklin; Richard B. Brown (VLSI Design, 2010)

Dynamically Pulsed MTCMOS With Bus Encoding for Reduction of Total Power and Crosstalk Noise. - Harmander Singh; Rahul M. Rao; Kanak Agarwal 001; Dennis Sylvester; Richard B. Brown (IEEE Trans. Very Large Scale Integr. Syst., 2010)

Slew-Rate Monitoring Circuit for On-Chip Process Variation Detection. - Amlan Ghosh; Rahul M. Rao; Jae-Joon Kim; Ching-Te Chuang; Richard B. Brown (IEEE Trans. Very Large Scale Integr. Syst., 2013)

An empirical model of UWB large-scale signal fading in neocortical research. - Ondrej Novák; Richard B. Brown (ISCAS, 2016)

Portable Bluetooth Microsystem for Electrochemically Modulated Nitric Oxide-Releasing Catheters. - Ondrej Novák; Kamila K. Konopinska; Mark E. Meyerhoff; Richard B. Brown (BioCAS, 2019)