A robust 1.5Gb/s + 3Gb/s serial PHY with feed-forward correction clock and data recovery. - William Redman-White; Martin Bugbee; Steve Dobbs; Xinyan Wu; Richard A. H. Balmford; Jonah Nuttgens; Umer Salim Kiani; Richard Clegg; Gerrit W. den Besten (ESSCIRC, 2008)

A Robust High Speed Serial PHY Architecture With Feed-Forward Correction Clock and Data Recovery. - William Redman-White; Martin Bugbee; Steve Dobbs; Xinyan Wu; Richard A. H. Balmford; Jonah Nuttgens; Umer Salim Kiani; Richard Clegg; Gerrit W. den Besten (IEEE J. Solid State Circuits, 2009)

DNEG, framestore, and MPC present: the visual effects of "Blade Runner 2049". - Richard Clegg; Richard Hoover; Chris McLaughlin (SIGGRAPH Production Sessions, 2018)