High Bandwidth RDRAM Technology Reduces System Cost. - Richard Crisp (COMPCON, 1996)

Direct RAMbus technology: the new main memory standard. - Richard Crisp (IEEE Micro, 1997)

A 2.6-GByte/s multipurpose chip-to-chip interface. - Benedict Lau; Yiu-Fai Chan; Alfredo Moncayo; John T. C. Ho; Mike Allen; Joe Salmon; Jonathan Liu; Manish Muthal; Cliff Lee; Tim Nguyen; Bryce Horine; Mike Leddige; et al. (IEEE J. Solid State Circuits, 1998)

Residual bulk image quantification and management for a full frame charge coupled device image sensor. - Richard Crisp (J. Electronic Imaging, 2011)

Cost-minimized double die DRAM packaging for ultra-high performance DDR3 and DDR4 multi-rank server DIMMs. - Richard Crisp; Bill Gervasi; Wael Zohni; Bel Haba (ISQED, 2012)

Residual Bulk Image Characterization using Photon Transfer Techniques. - Richard Crisp (IMSE, 2017)

A 4.8GB/s 256Mb(x16) Reduced-Pin-Count DRAM and Controller Architecture (RPCA) to Reduce Form-Factor & Cost for IOT/Wearable/TCON/Video/AI-Edge Systems. - Chun Shiah; C. N. Chang; Richard Crisp; C. P. Lin; C. N. Pan; C. P. Chuang; H. L. Chen; S. H. Jheng; T. F. Chang; W. J. Huang; K. C. Ting; Rick Dai; et al. (VLSI Circuits, 2019)