Panel: What is the Proper System on Chip Design Methodology. - Richard Goering; Pierre Bricaud; James G. Dougherty; Steve Glaser; Michael Keating; Robert Payne; Davoud Samani (DAC, 1999)

The future of system design languages (panel session). - Richard Goering; Clifford E. Cummings; Steven E. Schulz; Simon Davidman; John Sanguinetti; Joachim Kunkel; Oz Levia (DAC, 2000)

The Hidden Costs of Design Qualit. - Richard Goering; Richard Wallace (ISQED, 2000)

The 50-Million Transistor Chip: The Quality Challenge for 2001. - Rick Merritt; Richard Goering (ISQED, 2001)

Wall street evaluates EDA. - Moshe Gavrielov; Richard Goering; Lucio Lanza; Vishal Saluja; Jay Vleeschhouwer (DAC, 2002)

Evening Panel Discussion: Are the Interoperability Standards for EDA Too Little/Too Late for Real SoC Designs? - Pallab K. Chatterjee; Richard Goering (ISQED, 2002)

Foundries, EDA vendors, and designers: who shoulders the blame when a design doesn't work in the nano-scale and wireless era? - Jamil Kawa; Yuhua Cheng; Hiroshi Iwai; Richard Goering; Michael Campbell; Raul Camposano; Jon Fields; Patrick Lin; Steve Lloyd; Joseph Sawicki; Ed Wan (CICC, 2005)