A pseudo-hierarchical methodology for high performance microprocessor design. - A. Bertolet; K. Carpenter; Keith M. Carrig; Albert M. Chu; A. Dean; Frank D. Ferraiolo; Stephan Kenyon; D. Phan; John G. Petrovick; G. Rodgers; D. Willmott; T. Bairley; et al. (ISPD, 1997)

A Clock Methodology for High-Performance Microprocessors. - Keith M. Carrig; Albert M. Chu; Frank D. Ferraiolo; John G. Petrovick; P. Andrew Scott; Richard J. Weiss (J. VLSI Signal Process., 1997)