A 32-core RISC microprocessor with network accelerators, power management and testability features. - Brian Miller; Derek Brasili; Tim Kiszely; Rob Kuhn; Rahul Mehrotra; Manan Salvi; Mandar Kulkarni; Anand Varadharajan; Shi-Huang Yin; William Lin; Adam Hughes; Bill Stysiack; et al. (ISSCC, 2012)

Optical follow-up of gravitational wave triggers with DECam during the first two LIGO/VIRGO observing runs. - Ken Herner; James Annis; Dillon Brout; Marcelle Soares-Santos; Richard Kessler; Masao Sako; Ray F. Butler; Zoheyr Doctor; Antonella Palmese; Sahar Allam; Douglas L. Tucker; Flavia Sobreira; et al. (Astron. Comput., 2020)