A silicon monolithic memory utilizing a new storage element. - Richard R. Shively (AFIPS Fall Joint Computing Conference (1), 1965)

A Digital Processor to Generate Spectra in Real Time. - Richard R. Shively (IEEE Trans. Computers, 1968)

Arithmetic Unit of a Computing Element in a Global, Highly Parallel Computer. - John H. Huttenhoff; Richard R. Shively (IEEE Trans. Computers, 1969)

A novel implementation of digital phase shifters. - Ronald E. Crochiere; Lawrence R. Rabiner; Richard R. Shively (Bell Syst. Tech. J., 1975)

Architecture of a Programmable Digital Signal Processor. - Richard R. Shively (IEEE Trans. Computers, 1982)

Cascading Transmission Gates to Enhance Multiplier Performance. - Richard R. Shively; W. V. Robinson Jr.; D. E. Orton (IEEE Trans. Computers, 1984)

The ASPEN parallel computer, speech recognition and parallel dynamic programming. - Allen L. Gorin; Richard R. Shively (ICASSP, 1987)

A reconfigurable fault-tolerant systolic signal processor. - Richard R. Shively; Allen L. Gorin (ICASSP, 1989)

A high performance reconfigurable parallel processing architecture. - Richard R. Shively; E. B. Morgan; T. W. Copley; Allen L. Gorin (SC, 1989)

Application and packaging of the AT&T DSP3 parallel signal processor. - Richard R. Shively; Les J. Wu (ASAP, 1992)

Generalizing SPIHT: a family of efficient image compression algorithms. - Richard Robert Shively; Egbert Ammicht; Paul David Davis (ICASSP, 2000)

An efficient bit-loading algorithm for DMT applications. - Ranjan V. Sonalkar; Richard R. Shively (IEEE Commun. Lett., 2000)