Formal Approach to the RTL Testability Analysis. - Zdenek Kotásek; Richard Ruzicka; Jan Hlavicka (LATW, 2000)

Testable Design Verification Using Petri Nets. - Richard Ruzicka (DSD, 2003)

Easily Testable Image Operators: The Class of Circuits Where Evolution Beats Engineers. - Lukás Sekanina; Richard Ruzicka (Evolvable Hardware, 2003)

Formal Approach to Synthesis of a Test Controller. - Richard Ruzicka; Pavel Tupec (ECBS, 2004)

Evolutionary circuit design in REPOMO - reconfigurable polymorphic module. - Richard Ruzicka; Lukás Sekanina (Computational Intelligence, 2006)

Test Controller Synthesis Constrained by Circuit Testability Analysis. - Richard Ruzicka; Josef Strnadel (DSD, 2007)

Physical Demonstration of Polymorphic Self-Checking Circuits. - Richard Ruzicka; Lukás Sekanina; Roman Prokop (IOLTS, 2008)

Polymorphic FIR Filters with Backup Mode Enabling Power Savings. - Lukás Sekanina; Richard Ruzicka; Zbysek Gajda (AHS, 2009)

Dependable Controller Design Using Polymorphic Counters. - Richard Ruzicka (DSD, 2009)

REPOMO32 - New reconfigurable polymorphic integrated circuit for adaptive hardware. - Lukás Sekanina; Richard Ruzicka; Zdenek Vasícek; Roman Prokop; Lukás Fujcik (WEAH, 2009)

On analysis of fabricated polymorphic circuits. - Václav Simek; Richard Ruzicka; Lukás Sekanina (DDECS, 2010)

Gracefully Degrading Circuit Controllers Based on Polytronics. - Richard Ruzicka (DSD, 2010)

Behavior of CMOS polymorphic circuits in high temperature environment. - Richard Ruzicka; Václav Simek; Lukás Sekanina (DDECS, 2011)

Chip Temperature Selfregulation for Digital Circuits Using Polymorphic Electronics Principles. - Richard Ruzicka; Václav Simek (DSD, 2011)

NAND/NOR gate polymorphism in low temperature environment. - Richard Ruzicka; Václav Simek (DDECS, 2012)

Implementing A Unique Chip Id On A Reconfigurable Polymorphic Circuit. - Lukás Sekanina; Richard Ruzicka; Zdenek Vasícek; Václav Simek; Petr Hanácek (Inf. Technol. Control., 2013)

Implementation of a Cellular Automaton with Globally Switchable Rules. - Václav Simek; Richard Ruzicka; Adam Crha; Radek Tesar (ACRI, 2014)

Reconfigurable Platform with Polymorphic Digital Gates and Partial Reconfiguration Feature. - Václav Simek; Richard Ruzicka (EMS, 2014)

Resistant Gates for Polymorphic Electronics. - Radek Tesar; Richard Ruzicka; Václav Simek (EMS, 2014)

Toward efficient synthesis method of multifunctional logic circuits. - Václav Simek; Richard Ruzicka; Adam Crha (ICM, 2015)

Synthesis Methodology of Polymorphic Circuits Using Polymorphic NAND/NOR Gates. - Adam Crha; Richard Ruzicka; Václav Simek (UKSim, 2015)

Lets move polymorphism downwards: On the multifunctional logic based on ambipolar behaviour of semiconductor devices. - Richard Ruzicka; Radek Tesar (DTIS, 2016)

Modelling and physical implementation of ambipolar components based on organic materials. - Václav Simek; Radek Tesar; Richard Ruzicka; Adam Crha (ICM, 2016)

Evolutionary design of polymorphic gates using ambipolar transistors. - Jan Nevoral; Richard Ruzicka; Vojtech Mrazek (SSCI, 2016)

Synthesis tool for design of complex polymorphic circuits. - Adam Crha; Richard Ruzicka; Václav Simek (DTIS, 2017)

Compact library of efficient polymorphic gates based on ambipolar transistors. - Jan Nevoral; Václav Simek; Richard Ruzicka (DTIS, 2017)

From Ambipolarity to Multifunctionality: Novel Library of Polymorphic Gates Using Double-Gate FETs. - Jan Nevoral; Richard Ruzicka; Václav Simek (DSD, 2018)

Towards novel format for representation of polymorphic circuits. - Adam Crha; Václav Simek; Richard Ruzicka (DTIS, 2018)

CMOS Gates with Second Function. - Jan Nevoral; Richard Ruzicka; Václav Simek (ISVLSI, 2018)

Efficient Implementation of Bi-Functional RTL Components - Case Study. - Jan Nevoral; Richard Ruzicka (NGCAS, 2018)

PAIG Rewriting: The Way to Scalable Multifunctional Digital Circuits Synthesis. - Adam Crha; Václav Simek; Richard Ruzicka (DSD, 2019)

PoLibSi: Path Towards Intrinsically Reconfigurable Components. - Jan Nevoral; Václav Simek; Richard Ruzicka (DSD, 2019)

KL-cuts influence on optimization of polymorphic circuits based on PAIG rewriting. - Adam Crha; Václav Simek; Richard Ruzicka (DDECS, 2020)

Power Consumption Analysis of New Generation of Polymorphic Gates. - Jan Nevoral; Václav Simek; Richard Ruzicka (DDECS, 2020)

Technology Mapping for PAIG Optimised Polymorphic Circuits. - Richard Ruzicka; Václav Simek (DSD, 2022)

Polymorphic RTL Computational Elements. - Richard Ruzicka; Václav Simek; Jan Nevoral (DSD, 2023)