Stability in a general ΣΔ modulator. - Richard Schreier; W. Martin Snelgrove (ICASSP, 1991)

Destabilizing Limit Cycles in Delta-Sigma Modulators with Chaos. - Richard Schreier (ISCAS, 1993)

A Switched-Current Bandpass Delta-Sigma Modulator. - Srinivas V. Pattamatta; Praveen Manapragada; Vineet Dalal; Richard Schreier (ISCAS, 1994)

Invariant Sets for General Second-Order Lowpaws Delta-Sigma Modulators with DC Inputs. - Bo Zhang; Montgomery Goodson; Richard Schreier (ISCAS, 1994)

Proving Stability of Delta-Sigma Modulator Using Invariant Sets. - Montgomery Goodson; Bo Zhang; Richard Schreier (ISCAS, 1995)

A Decimation Filter Architecture for GHz Delta-Sigma Modulators. - Colin Kuskie; Bo Zhang; Richard Schreier (ISCAS, 1995)

Guest editorial: Delta-sigma modulators and noise shaping: current status, recent developments and future trends. - Orla Feely; Richard Schreier (Int. J. Circuit Theory Appl., 1997)

Modified mismatch-shaping for continuous-time delta-sigma modulators. - Tao Shui; Richard Schreier; Forrest Hudson (CICC, 1998)

Mismatch shaping for a current-mode multibit delta-sigma DAC. - Tao Shui; Richard Schreier; Forrest Hudson (IEEE J. Solid State Circuits, 1999)

Quadrature mismatch-shaping. - Richard Schreier (ISCAS (4), 2002)

A 10-300-MHz IF-digitizing IC with 90-105-dB dynamic range and 15-333-kHz bandwidth. - Richard Schreier; Jennifer Lloyd; Larry Singer; Donald Paterson; Mike Timko; Michael Hensley; Greg Patterson; Kevin Behel; James Zhou (IEEE J. Solid State Circuits, 2002)

A 942 MHz output, 17.5 MHz bandwidth, -70dBc IMD3 ΣΔ DAC. - Susan Luschas; Richard Schreier; Hae-Seung Lee (CICC, 2003)

Radio frequency digital-to-analog converter. - Susan Luschas; Richard Schreier; Hae-Seung Lee (IEEE J. Solid State Circuits, 2004)

Design-oriented estimation of thermal noise in switched-capacitor circuits. - Richard Schreier; José B. Silva; Jesper Steensgaard; Gabor C. Temes (IEEE Trans. Circuits Syst. I Regul. Pap., 2005)

A 375mW Quadrature Bandpass ΔΣ ADC with 90dB DR and 8.5MHz BW at 44MHz. - Richard Schreier; Nazmy Abaskharoun; Hajime Shibata; Iuri Mehr; Steve Rose; Donald Paterson (ISSCC, 2006)

A 375-mW Quadrature Bandpass$ Delta Sigma$ADC With 8.5-MHz BW and 90-dB DR at 44 MHz. - Richard Schreier; Nazmy Abaskharoun; Hajime Shibata; Donald Paterson; Steven Rose; Iuri Mehr; Qui Luu (IEEE J. Solid State Circuits, 2006)

A DC-to-1GHz tunable RF ΔΣ ADC achieving DR = 74dB and BW = 150MHz at f0 = 450MHz using 550mW. - Hajime Shibata; Richard Schreier; Wenhua Yang 002; Ali Shaikh; Donald Paterson; Trevor C. Caldwell; David Alldred; Ping Wing Lai (ISSCC, 2012)

A DC-to-1 GHz Tunable RF Delta Sigma ADC Achieving DR = 74 dB and BW = 150 MHz at f0 = 450 MHz Using 550 mW. - Hajime Shibata; Richard Schreier; Wenhua Yang 002; Ali Shaikh; Donald Paterson; Trevor C. Caldwell; David Alldred; Ping Wing Lai (IEEE J. Solid State Circuits, 2012)

Advances in high-speed continuous-time delta-sigma modulators. - Trevor C. Caldwell; David Alldred; Richard Schreier; Hajime Shibata; Yunzhi Dong (CICC, 2014)

29.2 A 235mW CT 0-3 MASH ADC achieving -167dBFS/Hz NSD with 53MHz BW. - Yunzhi Dong; Richard Schreier; Wenhua Yang 002; Sudhir Korrapati; Ali Sheikholeslami (ISSCC, 2014)

A Continuous-Time 0-3 MASH ADC Achieving 88 dB DR With 53 MHz BW in 28 nm CMOS. - Yunzhi Dong; William Yang; Richard Schreier; Ali Sheikholeslami; Sudhir Korrapati (IEEE J. Solid State Circuits, 2014)

EP2: Lost art? Analog tricks and techniques from the masters. - Tsung-Hsien Lin 001; Carlo Samori; Richard Schreier (ISSCC, 2015)

Guest Editorial: Next-Generation Delta-Sigma Converters. - José M. de la Rosa 001; Richard Schreier; Kong-Pang Pun; Shanthi Pavan (IEEE J. Emerg. Sel. Topics Circuits Syst., 2015)

Next-Generation Delta-Sigma Converters: Trends and Perspectives. - José M. de la Rosa 001; Richard Schreier; Kong-Pang Pun; Shanthi Pavan (IEEE J. Emerg. Sel. Topics Circuits Syst., 2015)

15.5 A 930mW 69dB-DR 465MHz-BW CT 1-2 MASH ADC in 28nm CMOS. - Yunzhi Dong; Jialin Zhao 001; Wenhua Yang 002; Trevor C. Caldwell; Hajime Shibata; Richard Schreier; Qingdong Meng; José B. Silva; Donald Paterson; Jeffrey C. Gealow (ISSCC, 2016)

A 72 dB-DR 465 MHz-BW Continuous-Time 1-2 MASH ADC in 28 nm CMOS. - Yunzhi Dong; Jialin Zhao 001; Wenhua Yang 002; Trevor C. Caldwell; Hajime Shibata; Zhao Li; Richard Schreier; Qingdong Meng; José B. Silva; Donald Paterson; Jeffrey C. Gealow (IEEE J. Solid State Circuits, 2016)