Block RAM Implementation of a Reconfigurable Real-time PID Controller. - Rikus le Roux; George van Schoor; Pieter van Vuuren (HPCC-ICESS, 2012)

Block RAM-based architecture for real-time reconfiguration using Xilinx® FPGAs. - Rikus le Roux; George van Schoor; Pieter van Vuuren (South Afr. Comput. J., 2015)

Parsing and analysis of a Xilinx FPGA bitstream for generating new hardware by direct bit manipulation in real-time. - Rikus le Roux; George van Schoor; Pieter A. van Vuuren (South Afr. Comput. J., 2019)

Improving functional density of time-critical applications using hardware-based dynamic reconfiguration and bitstream specialisation. - Rikus le Roux; George van Schoor; Pieter A. van Vuuren (South Afr. Comput. J., 2019)

Radiometric mapping of the Berg River estuary. - Ivan Henrico; Susan Henrico; Rikus le Roux; Jacques Bezuidenhout (Trans. GIS, 2023)