Scalable Connectivity Processor for Computer Music Performance Systems. - Rimas Avizienis; Adrian Freed; Takahiko Suzuki; David Wessel (ICMC, 2000)

A New Music Keyboard with Continuous Key-position Sensing and High-speed Communication. - Adrian Freed; Rimas Avizienis (ICMC, 2000)

Beyond 0-5V: Expanding Sensor Integration Architectures. - Adrian Freed; Rimas Avizienis; Matthew Wright 002 (NIME, 2006)

A Force Sensitive Multi-Touch Array Supporting Multiple 2-D Musical Control Structures. - David Wessel; Rimas Avizienis; Adrian Freed; Matthew Wright 002 (NIME, 2007)

RAMP gold: an FPGA-based architecture simulator for multiprocessors. - Zhangxi Tan; Andrew Waterman; Rimas Avizienis; Yunsup Lee; Henry Cook; David A. Patterson 001; Krste Asanovic (DAC, 2010)

The Maven vector-thread architecture. - Yunsup Lee; Rimas Avizienis; Alex Bishara; Richard Xia; Derek Lockhart; Christopher Batten; Krste Asanovic (Hot Chips Symposium, 2011)

Real-time Musical Applications on an Experimental Operating System for Multi-Core Processors. - Juan A. Colmenares; Ian Saxton; Eric Battenberg; Rimas Avizienis; Nils Peters; Krste Asanovic; John Kubiatowicz; David Wessel (ICMC, 2011)

Chisel: constructing hardware in a Scala embedded language. - Jonathan Bachrach; Huy Vo; Brian C. Richards; Yunsup Lee; Andrew Waterman; Rimas Avizienis; John Wawrzynek; Krste Asanovic (DAC, 2012)

The RISC-V instruction set. - Andrew Waterman; Yunsup Lee; Rimas Avizienis; Henry Cook; David A. Patterson 001; Krste Asanovic (Hot Chips Symposium, 2013)

Exploring the Tradeoffs between Programmability and Efficiency in Data-Parallel Accelerators. - Yunsup Lee; Rimas Avizienis; Alex Bishara; Richard Xia; Derek Lockhart; Christopher Batten; Krste Asanovic (ACM Trans. Comput. Syst., 2013)

A 45nm 1.3GHz 16.7 double-precision GFLOPS/W RISC-V processor with vector accelerators. - Yunsup Lee; Andrew Waterman; Rimas Avizienis; Henry Cook; Chen Sun 003; Vladimir Stojanovic; Krste Asanovic (ESSCIRC, 2014)

Raven: A 28nm RISC-V vector processor with integrated switched-capacitor DC-DC converters and adaptive clocking. - Yunsup Lee; Brian Zimmer; Andrew Waterman; Alberto Puggelli; Jaehwa Kwak; Ruzica Jevtic; Ben Keller; Stevo Bailey; Milovan Blagojevic; Pi-Feng Chiu; Henry Cook; Rimas Avizienis; et al. (Hot Chips Symposium, 2015)

A RISC-V vector processor with tightly-integrated switched-capacitor DC-DC converters in 28nm FDSOI. - Brian Zimmer; Yunsup Lee; Alberto Puggelli; Jaehwa Kwak; Ruzica Jevtic; Ben Keller; Stevo Bailey; Milovan Blagojevic; Pi-Feng Chiu; Hanh-Phuc Le; Po-Hung Chen; Nicholas Sutardja; et al. (VLSIC, 2015)

Single-chip microprocessor that communicates directly using light. - Chen Sun 003; Mark T. Wade; Yunsup Lee; Jason S. Orcutt; Luca Alloatti; Michael Georgas; Andrew Waterman; Jeffrey M. Shainline; Rimas Avizienis; Sen Lin 002; Benjamin Moss; Rajesh Kumar; et al. (Nat., 2015)

The Concept of a Software-Free Resilience Infrastructure for Cyber-Physical Systems. - Algirdas Avizienis; Rimas Avizienis; Audrius V. Avizienis (DSN Workshops, 2016)

A RISC-V Vector Processor With Simultaneous-Switching Switched-Capacitor DC-DC Converters in 28 nm FDSOI. - Brian Zimmer; Yunsup Lee; Alberto Puggelli; Jaehwa Kwak; Ruzica Jevtic; Ben Keller; Steven Bailey; Milovan Blagojevic; Pi-Feng Chiu; Hanh-Phuc Le; Po-Hung Chen; Nicholas Sutardja; et al. (IEEE J. Solid State Circuits, 2016)

An Agile Approach to Building RISC-V Microprocessors. - Yunsup Lee; Andrew Waterman; Henry Cook; Brian Zimmer; Ben Keller; Alberto Puggelli; Jaehwa Kwak; Ruzica Jevtic; Stevo Bailey; Milovan Blagojevic; Pi-Feng Chiu; Rimas Avizienis; et al. (IEEE Micro, 2016)

Microprocessor chip with photonic I/O. - Chen Sun 003; Mark T. Wade; Yunsup Lee; Jason S. Orcutt; Luca Alloatti; Michael S. Georgas; Andrew S. Waterman; Jeffrey M. Shainline; Rimas R. Avizienis; Sen Lin 002; Benjamin R. Moss; Rajesh Kumar; et al. (OFC, 2017)

The STAR-Guardian Network for the Protection of Long-Life Cyber-Physical Systems. - Algirdas V. Avizienis; Rimas Avizienis; Audrius V. Avizienis (DSN (Supplements), 2019)